BD82HM55QMNT Просмотр технического описания (PDF) - Intel
Номер в каталоге
Компоненты Описание
производитель
BD82HM55QMNT Datasheet PDF : 934 Pages
| |||
13.8.1.2 GEN_PMCON_2—General PM Configuration 2 Register
(PM—D31:F0) ......................................................................... 514
13.8.1.3 GEN_PMCON_3—General PM Configuration 3 Register
(PM—D31:F0) ......................................................................... 515
13.8.1.4 GEN_PMCON_LOCK- General Power Management Configuration
Lock Register.......................................................................... 518
13.8.1.5 Chipset Initialization Register 4 (PM—D31:F0)............................. 518
13.8.1.6 BM_BREAK_EN Register (PM—D31:F0) ....................................... 519
13.8.1.7 PMIR—Power Management Initialization Register (PM—D31:F0)..... 519
13.8.1.8 GPIO_ROUT—GPIO Routing Control Register
(PM—D31:F0) ......................................................................... 520
13.8.2 APM I/O Decode ................................................................................... 520
13.8.2.1 APM_CNT—Advanced Power Management Control Port Register ..... 520
13.8.2.2 APM_STS—Advanced Power Management Status Port Register ...... 521
13.8.3 Power Management I/O Registers ........................................................... 521
13.8.3.1 PM1_STS—Power Management 1 Status Register......................... 522
13.8.3.2 PM1_EN—Power Management 1 Enable Register .......................... 524
13.8.3.3 PM1_CNT—Power Management 1 Control.................................... 525
13.8.3.4 PM1_TMR—Power Management 1 Timer Register ......................... 526
13.8.3.5 PM1_TMR—Power Management 1 Timer Register ......................... 526
13.8.3.6 GPE0_STS—General Purpose Event 0 Status Register................... 527
13.8.3.7 GPE0_EN—General Purpose Event 0 Enables Register................... 529
13.8.3.8 SMI_EN—SMI Control and Enable Register.................................. 531
13.8.3.9 SMI_STS—SMI Status Register.................................................. 533
13.8.3.10ALT_GP_SMI_EN—Alternate GPI SMI Enable Register ................... 535
13.8.3.11ALT_GP_SMI_STS—Alternate GPI SMI Status Register.................. 536
13.8.3.12UPRWC—USB Per-Port Registers Write Control ............................ 536
13.8.3.13GPE_CNTL—General Purpose Control Register ............................. 537
13.8.3.14DEVACT_STS—Device Activity Status Register............................. 537
13.8.3.15PM2_CNT—Power Management 2 Control.................................... 538
13.9 System Management TCO Registers ................................................................... 539
13.9.1 TCO_RLD—TCO Timer Reload and Current Value Register........................... 539
13.9.2 TCO_DAT_IN—TCO Data In Register ....................................................... 540
13.9.3 TCO_DAT_OUT—TCO Data Out Register................................................... 540
13.9.4 TCO1_STS—TCO1 Status Register........................................................... 540
13.9.5 TCO2_STS—TCO2 Status Register........................................................... 542
13.9.6 TCO1_CNT—TCO1 Control Register ......................................................... 543
13.9.7 TCO2_CNT—TCO2 Control Register ......................................................... 544
13.9.8 TCO_MESSAGE1 and TCO_MESSAGE2 Registers ....................................... 544
13.9.9 TCO_WDCNT—TCO Watchdog Control Register ......................................... 545
13.9.10SW_IRQ_GEN—Software IRQ Generation Register ..................................... 545
13.9.11TCO_TMR—TCO Timer Initial Value Register ............................................. 545
13.10 General Purpose I/O Registers ........................................................................... 546
13.10.1GPIO_USE_SEL—GPIO Use Select Register ............................................... 547
13.10.2GP_IO_SEL—GPIO Input/Output Select Register ....................................... 547
13.10.3GP_LVL—GPIO Level for Input or Output Register...................................... 548
13.10.4GPO_BLINK—GPO Blink Enable Register................................................... 548
13.10.5GP_SER_BLINK—GP Serial Blink ............................................................. 549
13.10.6GP_SB_CMDSTS—GP Serial Blink Command Status ................................... 549
13.10.7GP_SB_DATA—GP Serial Blink Data......................................................... 550
13.10.8GPI_NMI_EN—GPI NMI Enable................................................................ 550
13.10.9GPI_NMI_STS—GPI NMI Status .............................................................. 550
13.10.10GPI_INV—GPIO Signal Invert Register.................................................... 551
13.10.11GPIO_USE_SEL2—GPIO Use Select 2 Register ......................................... 551
13.10.12GP_IO_SEL2—GPIO Input/Output Select 2 Register ................................. 552
13.10.13GP_LVL2—GPIO Level for Input or Output 2 Register................................ 552
13.10.14GPIO_USE_SEL3—GPIO Use Select 3 Register ......................................... 553
13.10.15GP_IO_SEL3—GPIO Input/Output Select 3 Register ................................. 554
13.10.16GP_LVL3—GPIO Level for Input or Output 3 Register................................ 554
13.10.17GP_RST_SEL1—GPIO Reset Select......................................................... 555
13.10.18GP_RST_SEL2—GPIO Reset Select......................................................... 555
13.10.19GP_RST_SEL3—GPIO Reset Select......................................................... 556
14 SATA Controller Registers (D31:F2) ....................................................................... 557
14.1 PCI Configuration Registers (SATA–D31:F2) ........................................................ 557
14.1.1 VID—Vendor Identification Register (SATA—D31:F2) ................................. 559
14.1.2 DID—Device Identification Register (SATA—D31:F2) ................................. 559
14
Datasheet
Share Link: 