RTL8111C Просмотр технического описания (PDF) - Realtek Semiconductor

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RTL8111C

INTEGRATED GIGABIT ETHERNET CONTROLLER FOR PCI EXPRESS™ APPLICATIONS

Realtek Semiconductor 

5. Pin Descriptions

The signal type codes below are used in the following tables:

I: Input

O: Output

T/S: Tri-State Bi-Directional Input/Output

RTL8111C

Datasheet

S/T/S: Sustained Tri-State

O/D: Open Drain

5.1. Power Management/Isolation

Symbol

LANWAKEB

ISOLATEB

Type

O/D

I

Table 1. Power Management/Isolation

Pin No Description

19

Power Management Event: Open drain, active low.

Used to reactivate the PCI Express slot’s main power rails and reference clocks.

Isolate Pin: Active low.

36

Used to isolate the RTL8111C from the PCI Express bus. The RTL8111C will not

drive its PCI Express outputs (excluding LANWAKEB) and will not sample its

PCI Express input as long as the Isolate pin is asserted.

5.2. PCI Express Interface

Symbol

REFCLK_P

REFCLK_N

HSOP

HSON

HSIP

HSIN

PERSTB

CLKREQB

Type

I

I

O

O

I

I

I

O/D

Table 2. PCI Express Interface

Pin No Description

26

PCI Express Differential Reference Clock Source: 100MHz ± 300ppm.

27

29

PCI Express Transmit Differential Pair.

30

23

PCI Express Receive Differential Pair.

24

PCI Express Reset Signal: Active low.

20

When the PERSTB is asserted at power-on state, the RTL8111C returns to a

pre-defined reset state and is ready for initialization and configuration after

the de-assertion of the PERSTB.

Reference Clock Request Signal.

33

This signal is used by the RTL8111C to request starting of the PCI Express

reference clock.

Integrated Gigabit Ethernet Controller for PCI Express

4

Track ID: JATR-1076-21 Rev. 1.5

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