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AM29LV800BB-90DTC2 Просмотр технического описания (PDF) - Advanced Micro Devices

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AM29LV800BB-90DTC2 Datasheet PDF : 11 Pages
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SUPPLEMENT
Am29LV800B Known Good Die
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)
CMOS 3.0 Volt-only, Boot Sector Flash Memory—Die Revision 2
DISTINCTIVE CHARACTERISTICS
s Single power supply operation
— 2.7 to 3.6 V for read, program, and erase
operations
— Ideal for battery-powered applications
s Manufactured on 0.32 µm process technology
s High performance
80, 90, or 120 ns access time
s Low power consumption (typical values at
5 MHz)
200 nA Automatic Sleep mode current
200 nA standby mode current
7 mA read current
15 mA program/erase current
s Flexible sector architecture
One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
fifteen 64 Kbyte sectors (byte mode)
One 8 Kword, two 4 Kword, one 16 Kword, and
fifteen 32 Kword sectors (word mode)
Supports full chip erase
Sector Protection features:
A hardware method of locking a sector to prevent
any program or erase operations within that
sector
Sectors can be locked in-system or via
programming equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
s Unlock Bypass Program Command
Reduces overall programming time when issuing
multiple program command sequences
s Top or bottom boot block configurations
available
s Embedded Algorithms
Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
Embedded Program algorithm automatically
writes and verifies data at specified addresses
s Minimum 1,000,000 write cycle guarantee
per sector
s Compatibility with JEDEC standards
Pinout and software compatible with single-
power supply Flash
Superior inadvertent write protection
s Data# Polling and toggle bits
Provides a software method of detecting program
or erase operation completion
s Ready/Busy# pin (RY/BY#)
Provides a hardware method of detecting
program or erase cycle completion
s Erase Suspend/Erase Resume
Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
s Hardware reset pin (RESET#)
Hardware method to reset the device to reading
array data
s 20-year data retention at 125°C
s Tested to datasheet specifications at
temperature
s Quality and reliability levels equivalent to
standard packaged components
Publication# 21356 Rev: E Amendment/0
Issue Date: March 12, 2002

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