X88C64PISLIC Просмотр технического описания (PDF) - Xicor -> Intersil
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X88C64PISLIC Datasheet PDF : 3 Pages
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X88C64 SLIC® E2
ing Gate Technology. The X88C64 features a Multi-
plexed Address and Data bus allowing direct inter-
face to a variety of popular single-chip microcontrollers
operating in expanded multiplexed mode without the
need for additional interface circuitry.
The X88C64 is internally configured as two indepen-
dent 4K x 8 memory arrays. This feature provides the
ability to perform nonvolatile memory updates in one
array and continue operation out of code stored in the
other array; effectively eliminating the need for an
auxiliary memory device for code storage.
To write to the X88C64 SLIC E2, a three-byte com-
mand sequence must precede the byte(s) being writ-
ten. This sequence called Software Data Protection
prevents the loss of data or program information due
to inadvertant write cycles during power-up or power-
down. The X88C64 SLIC E2 also provides a second
generation software data protection scheme called
Block Protect.
Block Protect can provide write lockout of the entire
device or selected 1K blocks. There are eight 1K x 8
blocks that can be write protected individually in any
combination required by the user. Block Protect, in
additional to Write Control input, allows the different
segments of the memory to have varying degrees of
alterability in normal system operation.
For further information on the X88C64 hardware
interface, consult the X88C64 Data Sheet.
PIN CONFIGURATION
DIP/SOIC
NC
A12
NC
NC
WC
PSEN
A/D0
A/D1
A/D2
A/D3
A/D4
VSS
1
24
2
23
3
22
4
21
5
20
6
19
X88C64
7
18
8
17
9
16
10
15
11
14
12
13
VCC
WR
ALE
A8
A9
A11
RD
A10
CE
A/D7
A/D6
A/D5
6540 FHD F02
PIN NAMES
Symbol
ALE
A/D0–A/D7
A8–A12
RD
WR
PSEN
CE
WC
VSS
VCC
Description
Address Latch Enable
Address Inputs/Data I/O
Address Inputs
Read Input
Write Input
Program Store Enable Input
Chip Enable
Write Control
Ground
Supply Voltage
6540 PGM T01
2
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