ATSAMA5D41A-CU Просмотр технического описания (PDF) - Atmel Corporation

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ATSAMA5D41A-CU

SMART ARM-based Embedded MPU

Atmel Corporation 

Table 2-1. Signal Description List (Continued)

Signal Name

Function

Type

External Bus Interface - EBI

D0–D15

Data Bus

I/O

A0–A25

Address Bus

Output

NWAIT

External Wait Signal

Input

Static Memory Controller - SMC

NCS0–NCS3

Chip Select Lines

Output

NWR0–NWR1

Write Signal

Output

NRD

Read Signal

Output

NWE

Write Enable

Output

NBS0–NBS1

Byte Mask Signal

Output

NANDOE

NAND Flash Output Enable

Output

NANDWE

NAND Flash Write Enable

Output

DDR2/LPDDR2 Controller

DDR_CK,DDR_CKN

DDR2 Differential Clock

Output

DDR_CKE

DDR2 Clock Enable

Output

DDR_CS

DDR2 Controller Chip Select

Output

DDR_BA[2..0]

Bank Select

Output

DDR_WE

DDR2 Write Enable

Output

DDR_RAS - DDR_CAS

Row and Column Signal

Output

DDR_A[13..0]

DDR2 Address Bus

Output

DDR_D[31..0]

DDR2 Data Bus

I/O/-PD

DDR_DQS[3..0], DDR_DQSN[3..0]

Differential Data Strobe

I/O-PD

DDR_DQM[3..0]

Write Data Mask

Output

DDR_CALP, DDR_CALN

DDR2/LPDDR2 Calibration

Input

DDR_VREF

DDR2/LPDDR2 Reference

Input

High Speed Multimedia Card Interface - HSMCIx [1..0]

MCI0_CK, MCI1_CK

Multimedia Card Clock

I/O

MCI0_CDA, MCI0_CDB, MCI1_CDA

Multimedia Card Command

I/O

MCI0_DA[7..0]

Multimedia Card 0 Data slot A

I/O

MCI0_DB[3..0]

Multimedia Card 0 Data slot B

I/O

MCI1_DA[3..0]

Multimedia Card 1 Data

I/O

Universal Synchronous Asynchronous Receiver Transmitter - USARTx [4..0]

SCKx

USARTx Serial Clock

I/O

TXDx

USARTx Transmit Data

Output

RXDx

USARTx Receive Data

Input

RTSx

USARTx Request To Send

Output

CTSx

USARTx Clear To Send

Input

Active Level

–

–

Low

Low

Low

Low

Low

Low

Low

Low

–

High

Low

Low

Low

Low

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

6

SAMA5D4 Series [DATASHEET]

Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16

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