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ATSAMA5D41A-CU Просмотр технического описания (PDF) - Atmel Corporation

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производитель
ATSAMA5D41A-CU
Atmel
Atmel Corporation Atmel
ATSAMA5D41A-CU Datasheet PDF : 1808 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
̶ One 5-channel 10-bit Analog-to-Digital Converter with Resistive Touchscreen function
Safety
̶ Internal and external memory integrity monitoring, with Integrity Check Monitor (ICM) based on SHA256
̶ Power-on Reset Cells
̶ Main Crystal Clock Failure Detector
̶ Independent Watchdog
̶ Register Write Protection
̶ Memory Management Unit
Security
̶ 512 bits of scrambled and erasable registers (1)
̶ 8 Kbytes of internal scrambled RAM with non-imprinting support, 6 Kbytes are erasable (1)
̶ 8 PIOBU tamper pins for static or dynamic intrusion detections (1)
̶ Atmel secure boot (2)
Cryptography
̶ True Random Number Generator (TRNG), compliant with NIST special publication 800-22 test suite and FIPS
PBUs 140-2 and 140-3
̶ SHA: Supports Secure Hash Algorithm (SHA1, SHA224, SHA256, SHA384, SHA512) compliant with FIPS
publications 180-2
̶ AES: 256-bit, 192-bit, 128-bit Key Algorithm, compliant with FIPS PUB 197 specifications
̶ Advanced Encryption Standard Bridge (AESB): AES 128 that includes Automatic Bridge Mode for automatic
DDR port Encryption/Decryption
̶ TDES: Two-key or Three-key Algorithms, compliant with FIPS PUB 46-3 specifications
̶ Public Key Coprocessor (CPKCC) and associated Classical Public Key Cryptography Library (CPKCL) for RSA,
DSA, ECC GF(2n), ECC GF(p) (3)
Up to 152 I/Os
̶ Five Parallel Input/Output Controllers with slew rate control on high-speed I/Os
̶ Input Change Interrupt capability on each I/O Line, selectable Schmitt Trigger input
̶ Individually Programmable Open-drain, Pull-up and Pull-down Resistor, Synchronous Output, Filtering
Packages
̶ 361-ball stubless TFBGA, 16x16 mm body, pitch 0.8 mm
̶ 289-ball stubless LFBGA, 14x14 mm body, pitch 0.8 mm
SAMA5D4 Series Devices
Device
SAMA5D44
SAMA5D43
SAMA5D42
SAMA5D41
Package
TFBGA361
LFBGA289
TFBGA361
LFBGA289
Video Decoder
X
X
DDR Datapath
32 bits
16 bits
32 bits
16 bits
1. This feature is described in the document “Secure Box Module (SBM)”, Atmel literature No. 11254. This document is available under Non-Disclosure Agreement
(NDA). Contact an Atmel Sales Representative for further details.
2. For secure boot strategies, refer to the application note “SAMA5D4x Secure Boot Strategy”, Atmel literature No. 11295. This document is available under Non-
Disclosure Agreement (NDA). Contact an Atmel Sales Representative for further details.
3. CPKCC and CPKCL are described in the application note “Using CPKCL Version 02.05.01.xx on SAMA5D4”, Atmel literature No. 11214. This document is
available under Non-Disclosure Agreement (NDA). Contact an Atmel Sales Representative for further details.
SAMA5D4 Series [DATASHEET]
3
Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16

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