ATSAMA5D41A-CU Просмотр технического описания (PDF) - Atmel Corporation

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ATSAMA5D41A-CU

SMART ARM-based Embedded MPU

Atmel Corporation 

4. Power Considerations

4.1 Power Supplies

Table 4-1 defines the different power supplies rails and the estimated power consumption at typical voltage.

All 3.3V power rails are to be established prior to VDDCORE and must always be present. Specific power

sequences ensure reliable operation of the device and avoid unwanted security events.

Table 4-1. Power Supplies

Name

Associated

Voltage Range, Nominal Ground

Powers

VDDCORE 1.62–1.98V, 1.8V

GNDCORE

Regulator that generates core power supply on VCCCORE

10 µF decoupling capacitor is to be connected to VCCCORE

MUST BE ESTABLISHED AFTER VDDIOP OR AT THE SAME TIME

VCCCORE 1.1–1.32V, 1.2V

GNDCORE Core

1.70–1.90V, 1.8V

VDDIODDR

1.14–1.30V, 1.2V

DDR2 Interface I/O lines

GNDIODDR

LP-DDR2 Interface I/O lines

VDDIOM

1.65–1.95V, 1.8V

3.0–3.6V, 3.3V

GNDIOM NAND and HSMC Interface I/O lines

VDDIOP (1) 3.0–3.6V, 3.3V

GNDIOP

Peripherals I/O lines

MUST BE ESTABLISHED PRIOR TO VDDCORE

VDDBU

1.88V–2.6V, 2V

GNDBU

Slow Clock oscillator, the internal 64 kHz RC and a part of the System

Controller

MUST BE ESTABLISHED FIRST

VDDUTMIC 1.1–1.32V, 1.2V

GNDUTMI

USB device and host UTMI+ core and the UTMI PLL

MUST be connected to VCCCORE

VDDUTMII 3.0–3.6V, 3.3V

GNDUTMI USB device and host UTMI+ interface

VDDPLLA 1.1–1.32V, 1.2V

GNDPLL

PLLA cell

MUST be connected to VCCCORE

VDDOSC 3.0V–3.6V, 3.3V

GNDOSC Main Oscillator cell

VDDANA (1) 3.0–3.6V, 3.3V

GNDANA

Analog parts

MUST be connected to VDDIOP with filtering

VDDFUSE 2.25–2.75V, 2.5V

Fuse box for programming

GNDFUSE

VDDFUSE must be 2.5V or 0V and must not be left floating

Notes: 1. VDDIOP and VDDANA must rise at the same time.

28 SAMA5D4 Series [DATASHEET]

Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16

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