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SI531 Просмотр технического описания (PDF) - Unspecified

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производитель
SI531 Datasheet PDF : 12 Pages
First Prev 11 12
Si530/531
DOCUMENT CHANGE LIST
Revision 0.4 to Revision 0.5
Updated Table 1, “Recommended Operating
Conditions,” on page 2.
Added maximum supply current specifications.
Specified relationship between temperature at startup
and operation temperature.
Updated Table 4, “CLK± Output Phase Jitter,” on
page 4 to include maximum rms jitter generation
specifications and updated typical rms jitter
specifications.
Added Table 6, “CLK± Output Phase Noise
(Typical),” on page 4.
Added Output Enable active polarity as an option in
Figure 1, “Part Number Convention,” on page 7.
Revision 0.5 to Revision 1.0
Updated Note 3 in Table 1, “Recommended
Operating Conditions,” on page 2.
Updated Figure 1, “Part Number Convention,” on
page 7.
Revision 1.0 to Revision 1.1
Updated Table 1, “Recommended Operating
Conditions,” on page 2.
Device maintains stable operation over –40 to +85 ºC
operating temperature range.
Supply current specifications updated for revision D.
Updated Table 2, “CLK± Output Frequency
Characteristics,” on page 2.
Added specification for ±20 ppm lifetime stability
(±7 ppm temperature stability) XO.
Updated Table 3, “CLK± Output Levels and
Symmetry,” on page 3.
Updated LVDS differential peak-peak swing
specifications.
Updated Table 4, “CLK± Output Phase Jitter,” on
page 4.
Updated Table 5, “CLK± Output Period Jitter,” on
page 4.
Revised period jitter specifications.
Updated Table 9, “Absolute Maximum Ratings1,” on
page 5 to reflect the soldering temperature time at
260 ºC is 20–40 sec per JEDEC J-STD-020C.
Updated 3. "Ordering Information" on page 7.
Changed ordering instructions to revision D.
Added 5. "Si530/Si531 Mark Specification" on page
9.
Revision 1.1 to Revision 1.2
Updated 2.5 V/3.3 V and 1.8 V CML output level
specifications for Table 3 on page 3.
Added footnotes clarifying max offset frequency test
conditions for Table 4 on page 4.
Added CMOS phase jitter specs to Table 4 on
page 4.
Removed the words "Differential Modes:
LVPECL/LVDS/CML" in the footnote referring to
AN256 in Table 4 on page 4.
Separated 1.8 V, 2.5 V/3.3 V supply voltage
specifications in Table 9 on page 5.
Updated and clarified Table 9 on page 5 to include
the "Moisture Sensitivity Level" and "Contact Pads"
rows.
Updated Figure 3 on page 9 and Table 13 on page 9
to reflect specific marking information. Previously,
Figure 3 was generic.
Revision 1.2 to Revision 1.3
Added Table 8, “Thermal Characteristics,” on
page 5.
Revision 1.3 to Revision 1.4
Revised Figure 2 and Table 12 on page 8 to reflect
current package outline diagram.
Revised Figure 4 and Table 14 on page 10 to reflect
the recommended PCB land pattern.
Revision 1.4 to Revision 1.5
Changed “Trays” to “Coil Tape” in Ordering Guide.
11
Rev. 1.5

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