EL7585AILZ(2005) Просмотр технического описания (PDF) - Intersil

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производитель

EL7585AILZ
(Rev.:2005)

TFT-LCD Power Supply

Intersil 

EL7585A

the transistor. VF is the forward-voltage of the charge pump

rectifier diode.

The number of negative charge pump stages is given by:

NNEGATIVE ≥ --V-V---O-I--N--U--P--T--U-P---T-U----–-T---2---+--×---V--V--C--F--E--

To achieve high efficiency and low material cost, the lowest

number of charge pump stages which can meet the above

requirements, is always preferred.

High Charge Pump Output Voltage (>36V)

Applications

In the applications where the charge pump output voltage is

over 36V, an external npn transistor need to be inserted into

between DRVP pin and base of pass transistor Q3 as shown

in Figure 26; or the linear regulator can control only one

stage charge pump and regulate the final charge pump

output as shown in Figure 27.

CHARGE PUMP

VIN

OUTPUT

OR AVDD

7kΩ

DRVP

Q3

NPN

CASCODE

TRANSISTOR

EL7585A

VON

FBP

FIGURE 26. CASCODE NPN TRANSISTOR CONFIGURATION

FOR HIGH CHARGE PUMP OUTPUT VOLTAGE

(>36V)

0.1µF

0.1µF

7kΩ

DRVP

Q3

0.1µF

EL7585A

0.47µF

0.1µF

FBP

LX

AVDD

0.1µF

VON

(>36V)

0.22µF

FIGURE 27. THE LINEAR REGULATOR CONTROLS ONE

STAGE OF CHARGE PUMP

Discontinuous/Continuous Boost Operation and

its Effect on the Charge Pumps

The EL7585A VON and VOFF architecture uses LX switching

edges to drive diode charge pumps from which LDO

regulators generate the VON and VOFF supplies. It can be

appreciated that should a regular supply of LX switching

edges be interrupted, for example during discontinuous

operation at light AVDD boost load currents, then this may

affect the performance of VON and VOFF regulation -

depending on their exact loading conditions at the time.

To optimize VON/VOFF regulation, the boundary of

discontinuous/continuous operation of the boost converter

can be adjusted, by suitable choice of inductor given VIN,

VOUT, switching frequency and the AVDD current loading, to

be in continuous operation.

The following equation gives the boundary between

discontinuous and continuous boost operation. For

continuous operation (LX switching every clock cycle) we

require that:

I(AVDD_load) > D*(1-D)*VIN/(2*L*FOSC)

where the duty cycle, D = (AVDD - VIN)/AVDD

For example, with VIN = 5V, FOSC = 1.0MHz and AVDD =

12V we find continuous operation of the boost converter can

be guaranteed for:

L = 10µH and I(AVDD) > 61mA

L = 6.8µH and I(AVDD) > 89mA

L = 3.3µH and I(AVDD) > 184mA

Charge Pump Output Capacitors

Ceramic capacitors with low ESR are recommended. With

ceramic capacitors, the output ripple voltage is dominated by

the capacitance value. The capacitance value can be

chosen by the following equation:

COUT

≥

---------------------I--O----U-----T----------------------

2 × VRIPPLE × fOSC

where fOSC is the switching frequency.

Start-Up Sequence

Figure 28 shows a detailed start-up sequence waveform. For

a successful power-up, there should be six peaks at VCDLY.

When a fault is detected, the device will latch off until either

EN is toggled or the input supply is recycled.

When the input voltage (VDD) exceeds 2.5V, VREF and

VLOGIC turn on. At the same time, if EN is tied to VDD, an

internal current source starts to charge CDLY to an upper

threshold using a fast ramp followed by a slow ramp. If EN is

low at this point, the CDLY ramp will be delayed until EN

goes high.

The first four ramps on CDLY (two up, two down) are used to

initialize the fault protection switch and to check whether

13

FN7523.2

September 21, 2005

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