74ALVCH16601DGG11 Просмотр технического описания (PDF) - NXP Semiconductors.
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74ALVCH16601DGG11 Datasheet PDF : 13 Pages
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Philips Semiconductors
18-bit universal bus transceiver (3-State)
Product specification
74ALVCH16601
AC WAVEFORMS
VCC = 2.3 TO 2.7 V RANGE
1. VM = 0.5 V
2. VX = VOL + 0.15V
3. VY = VOH – 0.15V
4. VI = VCC
5. VOL and VOH are the typical output voltage drop that occur with
the output load.
VCC = 3.0 TO 3.6 V RANGE AND VCC = 2.7 V
1. VM = 1.5 V
2. VX = VOL + 0.3V
3. VY = VOH – 0.3V
4. VI = 2.7 V
5. VOL and VOH are the typical output voltage drop that occur with
the output load.
VI
An, Bn
INPUT
VM
GND
VOH
tPHL
tPLH
Bn, An
OUTPUT
VM
VOL
SW00063
Waveform 1. Input (An, Bn) to output (Bn, An) propagation
delays
VI
LEXX
INPUT
CPXX
INPUT
GND
VOH
1/fmax
VM
tW
tPHL
tPLH
An, Bn
OUTPUT
VM
VOL
SW00134
Waveform 2. Latch enable input (LEAB, LEBA) and clock pulse
input (CPAB, CPBA) to output propagation delays and their
pulse width
VI
OEXX INPUT
VM
GND
VCC
OUTPUT
LOW-to-OFF
OFF-to-LOW
VOL
tPLZ
VX
tPZL
VM
VOH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
tPHZ
outputs
en-
abled
tPZH
VY
VM
outputs
dis-
abled
outputs
en-
abled
SW00127
Waveform 3. 3-State enable and disable times
VI
ÉÉÉ An, Bn
ÉÉÉ INPUT
VM
ÉÉÉ GND
th ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉtÉÉÉh ÉÉÉÉÉÉ
tSU
tSU
VI
CPXX, LEXX
INPUT
VM
GND
NOTE: The unshaded areas indicate when the input is permitted
to change for predictable output performance.
SW00128
Waveform 4. Data set-up and hold times for the An and Bn
inputs to the LEAB, LEBA, CPAB and CPBA inputs
TEST CIRCUIT
VCC
PULSE
GENERATOR
VIN
RT
D.U.T.
VOUT
CL
S1
2<VCC
Open
GND
RL=500 Ω
RL=500 Ω
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
SWITCH
Open
2<VCC
GND
VCC
t 2.7V
2.7 – 3.6V
VIN
VCC
2.7V
DEFINITIONS
RL = Load resistor
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to ZOUT
of pulse generators.
SW00047
Load circuitry for switching times
1998 Sep 24
10
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