EVAL-ADIS2 Просмотр технического описания (PDF) - Analog Devices
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EVAL-ADIS2 Datasheet PDF : 20 Pages
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ADIS16362
Data Sheet
MEMORY MAP
Table 8. User Register Memory Map
Name
R/W
Flash Backup
FLASH_CNT
R
Yes
SUPPLY_OUT R
No
XGYRO_OUT R
No
YGYRO_OUT R
No
ZGYRO_OUT R
No
XACCL_OUT R
No
YACCL_OUT R
No
ZACCL_OUT R
No
XTEMP_OUT R
No
YTEMP_OUT R
No
ZTEMP_OUT R
No
AUX_ADC
R
No
Reserved
N/A
N/A
XGYRO_OFF R/W
Yes
YGYRO_OFF R/W
Yes
ZGYRO_OFF R/W
Yes
XACCL_OFF
R/W
Yes
YACCL_OFF
R/W
Yes
ZACCL_OFF
R/W
Yes
ALM_MAG1
R/W
Yes
ALM_MAG2
R/W
Yes
ALM_SMPL1 R/W
Yes
ALM_SMPL2 R/W
Yes
ALM_CTRL
R/W
Yes
AUX_DAC
R/W
No
GPIO_CTRL
R/W
No
MSC_CTRL
R/W
Yes
SMPL_PRD
R/W
Yes
SENS_AVG
R/W
Yes
SLP_CNT
W
No
DIAG_STAT
R
No
GLOB_CMD
W
N/A
Reserved
N/A
N/A
LOT_ID1
R
Yes
LOT_ID2
R
Yes
PROD_ID
R
Yes
SERIAL_NUM R
Yes
Address 1
0x00
0x02
0x04
0x06
0x08
0x0A
0x0C
0x0E
0x10
0x12
0x14
0x16
0x18
0x1A
0x1C
0x1E
0x20
0x22
0x24
0x26
0x28
0x2A
0x2C
0x2E
0x30
0x32
0x34
0x36
0x38
0x3A
0x3C
0x3E
0x40 to 0x51
0x52
0x54
0x56
0x58
Default
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0006
0x0001
0x0402
0x0000
0x0000
0x0000
N/A
N/A
N/A
0x3FEA
N/A
Register Description
Flash memory write count
Power supply measurement
X-axis gyroscope output
Y-axis gyroscope output
Z-axis gyroscope output
X-axis accelerometer output
Y-axis accelerometer output
Z-axis accelerometer output
X-axis gyroscope temperature measurement
Y-axis gyroscope temperature measurement
Z-axis gyroscope temperature measurement
Auxiliary ADC output
Reserved
X-axis gyroscope bias offset factor
Y-axis gyroscope bias offset factor
Z-axis gyroscope bias offset factor
X-axis acceleration bias offset factor
Y-axis acceleration bias offset factor
Z-axis acceleration bias offset factor
Alarm 1 amplitude threshold
Alarm 2 amplitude threshold
Alarm 1 sample size
Alarm 2 sample size
Alarm control
Auxiliary DAC data
Auxiliary digital input/output control
Miscellaneous control: data ready, self-test
Internal sample period (rate) control
Dynamic range and digital filter control
Sleep mode control
System status
System command
Reserved
Lot Identification Code 1
Lot Identification Code 2
Product identification
Serial number
Bit Function
N/A
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
N/A
See Table 15
See Table 15
See Table 15
See Table 16
See Table 16
See Table 16
See Table 27
See Table 27
See Table 28
See Table 28
See Table 29
See Table 23
See Table 21
See Table 22
See Table 18
See Table 20
See Table 19
See Table 26
See Table 17
N/A
See Table 32
See Table 32
See Table 32
See Table 32
1 Each register contains two bytes. The address of the lower byte is displayed. The address of the upper byte is equal to the address of the lower byte plus 1.
Rev. F | Page 10 of 20
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