AD5328(RevB) Просмотр технического описания (PDF) - Analog Devices

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AD5328
(Rev.:RevB)

2.5 V to 5.5 V Octal Voltage Output 8-/10-/12-Bit DACs in 16-Lead TSSOP

Analog Devices 

0.2

TA = 25؇C

0.1 VREF = 2V

0

–0.1

GAIN ERROR

–0.2

–0.3

–0.4

OFFSET ERROR

–0.5

–0.6

0

1

2

3

4

VDD (V)

5

6

TPC 10. Offset Error and

Gain Error vs. VDD

1.3

TA = 25؇C

1.2

VREF = 2V, GAIN = +1,

BUFFERED

1.1

VREF = VDD

1.0

0.9

0.8

VREF = 2V, GAIN = +1, UNBUFFERED

0.7 VREF = VDD, GAIN = +1, UNBUFFERED

0.6

2.0 2.5 3.0 3.5 4.0 4.5 5.0

SUPPLY VOLTAGE (V)

TPC 13. Supply Current vs.

Supply Voltage

AD5308/AD5318/AD5328

5

5V SOURCE

4

3V SOURCE

3

2

1

3V SINK

5V SINK

0

0

1

2

3

4

5

6

SINK/SOURCE CURRENT (mA)

TPC 11. VOUT Source and

Sink Current Capability

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

ZERO SCALE

VDD = 5V

TA = 25؇C

HALF SCALE

DAC CODE

FULL SCALE

TPC 12. Supply Current vs.

DAC Code

1.0

0.9 TA = 25؇C

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5

VDD (V)

TPC 14. Power-Down Current vs.

Supply Voltage

1.4

DECREASING

1.3

INCREASING

1.2

TA = 25؇C

VDD = 5V

1.1

1.0

0.9

0.8

VDD = 3V

0.7

0.6

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

VLOGIC (V)

TPC 15. Supply Current vs. Logic

Input Voltage for SCLK and DIN

Increasing and Decreasing

TA = 255µ؇Cs

VDD = 5V

VREF = 5V

CH1

VOUTA

CH2

SCLK

CH1 1V, CH2 5V, TIME BASE = 1␮s/DIV

TPC 16. Half-Scale Settling (1/4

to 3/4 Scale Code Change)

TA = 25؇C

VDD = 5V

VREF = 2V

VDD

CH1

CH2

VOUTA

CH1 2.00V, CH2 200mV, TIME BASE = 200␮s/DIV

TPC 17. Power-On Reset to 0 V

TA = 25؇C

VDD = 5V

VREF = 2V

CH1

VOUTA

PD

CH2

CH1 500mV, CH2 5.00V, TIME BASE = 1␮s/DIV

TPC 18. Exiting Power-Down

to Midscale

REV. B

–9–

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