DF8064101211300SR0VY Просмотр технического описания (PDF) - Intel

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DF8064101211300SR0VY

Intel® Atom™ Processor D2000 and N2000 Series

Intel 

3-22Support DRAM Devices..............................................................................................33

3-23Supported Memory Size Per Rank ...............................................................................33

3-24Support Memory Configurations .................................................................................33

3-25Analog Port Characteristics ........................................................................................39

3-26Panel Power Sequence Timing Parameters ...................................................................42

3-27Main Memory States .................................................................................................47

4-28PLL Reference Clock..................................................................................................49

4-29VRD 12.0 Voltage Identification Definition....................................................................50

4-30Processor Core Active and Idle Mode DC Voltage and Current Specifications .....................58

4-31Istep ......................................................................................................................60

4-32Processor Uncore I/O Buffer Supply DC Voltage and Current Specifications.......................60

4-33Input Clocks (BCLK, HPL_CLKIN, DPL_REFCLKIN, EXP_CLKIN) Differential Specification .....64

4-34DDR3/DDR3L Signal Group DC Specifications ...............................................................64

4-35CPU Sideband CMOS Signal Group DC Specification.......................................................65

4-36CPU Sideband OD 25 Ohm 1.05 V Signal Group DC Specification ....................................65

4-37CPU Sideband OD 12.5 Ohms 1.05 V Signal Group DC Specification ................................66

4-38CPU Sideband OD 1.8 V Signal Group DC Specification ..................................................66

4-393.3-V DC Specification ..............................................................................................67

4-401.5-V DC specification ...............................................................................................67

4-41High Voltage GPIO CMOS Signal DC Specification..........................................................68

4-42R,G,B/CRT DAC Display DC specification (Functional Operating Range) ............................68

4-43High Voltage GPIO OD Signal DC Specification..............................................................69

4-44CRT_HSYNC and CRT_VSYNC DC Specification .............................................................69

4-45LVDS Interface DC Specification (Functional Operating Range,

VCCLVDS = 1.8 V ±5%)............................................................................................69

4-46DDI Main Transmitter DC Specification ........................................................................70

4-47DDI AUX Channel DC Specification..............................................................................71

4-48DMI Receiver DC specification ....................................................................................73

5-49Processor Ball list by Ball Name ..................................................................................78

6-50Input Signal Group Ringback Duration Specification ......................................................95

7-51System States .........................................................................................................97

7-52Processor Core/ States Support ..................................................................................97

7-53Integrated Graphics Display Device Control..................................................................98

7-54Main Memory States .................................................................................................98

7-55DMI States ..............................................................................................................98

7-56G, S and C State combinations ...................................................................................99

7-57D, S and C state Combinations ...................................................................................99

7-58Coordination of Thread Low-power States at the /Core Level ........................................ 103

7-59Coordination of Core Power States at the package Level .............................................. 108

8-60Power Specifications for the Standard Voltage Processor (Updated) ............................... 116

9-61Supported TAP Instructions...................................................................................... 121

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Datasheet - Volume 1 of 2

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