RF2137 Просмотр технического описания (PDF) - RF Micro Devices

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RF2137

LINEAR POWER AMPLIFIER

RF Micro Devices 

RF2137

Pin Function Description

Interface Schematic

1

VCC

Power supply for the driver stage, and interstage matching. Shunt

VCC

inductance is required on this pin, which can be achieved by an induc-

tor to VCC, with a decoupling capacitor on the VCC side. The value of

the inductor is frequency dependent; 3.3nH is required for 830MHz,

RF IN

and 1.2nH for 950MHz. Instead of an inductor, a high impedance

microstrip line can be used.

From Bias

Stages

2

RF IN

RF input. This is a 50Ω input, but the actual input impedance depends See pin 1.

2

on the interstage matching network connected to pin 1. An external DC

blocking capacitor is required if this port is connected to a DC path to

ground or a DC voltage.

3

GND

Ground connection. Keep traces physically short and connect immedi-

ately to the ground plane for best performance.

4

PC

Power Control. When this pin is "low", all circuits are shut off. A "low" is

PC

typically 0.5V or less at room temperature. During normal operation

this pin is the power control. Control range varies from about 2V for

0dBm to VCC for +31dBm RF output power. The maximum power that

can be achieved depends on the actual output matching. PC should

never exceed 6.0V or VCC, whichever is lowest.

To RF

Transistors

5

6

7

8

Pkg

Base

RF OUT

RF OUT

RF OUT

RF OUT

GND

RF Output and power supply for the output stage. The three output pins

are combined, and bias voltage for the final stage is provided through

these pins. The external path must be kept symmetric until combined to

ensure stability. An external matching network is required to provide the

optimum load impedance; see the application schematics for details.

Same as pin 5.

Same as pin 5.

Same as pin 5.

Ground connection. The backside of the package should be connected

to the ground plane through a short path, i.e., vias under the device

may be required.

RF OUT

From Bias

Stages

See pin 5.

See pin 5.

See pin 5.

VCC

C8

3.3 µF

Evaluation Board Schematic

(Download Bill of Materials from www.rfmd.com.)

C9

1 nF

C5

100 pF

L1

1.8 nH

2137400A

L2

4.7 nH

C6

100 pF

P1

P1-1 1 VCC

2 GND

P1-3 3 PC

C3

1

8

RF IN

50 Ω µstrip

100 pF

J1

2

7

R1

10 kΩ

3

6

PC

C7

4

BIAS

5

1 nF

PACKAGE BASE

L3

1.5 nH

C4

100 pF

C1

1.5 pF

C2

7.5 pF

50 Ω µstrip

RF OUT

J2

Rev B2 010720

2-117

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