GBE-PCS-PM-U1 Просмотр технического описания (PDF) - Lattice Semiconductor

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GBE-PCS-PM-U1

Gigabit Ethernet PCS IP Core for LatticeECP2M

Lattice Semiconductor 

Lattice Semiconductor

Figure 7. Configuration Dialog Box

Gigabit Ethernet PCS IP Core

for LatticeECP2M

When you click the Generate button, the IP core and supporting files are generated in the specified Project Path

directory. The directory structure of the generated files is shown in Figure 8.

Figure 8. GbE PCS IP Core Generated Directory Structure

The following files are generated at the root of the “Project Path” directory (gbe_pcs_test in Figure 8):

• <username>.lpc – IP parameter file (you may modify this file if necessary)

• <username>.ngo – Synthesized and mapped IP core

• <username>_bb.v – Black box module wrapper for synthesis

• <username>_inst.v – Example of instantiation template to be included in customer’s design

• <username>_beh.v – Behavioral simulation model for IP core configuration username

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