AD9216BCPZ-65 Просмотр технического описания (PDF) - Analog Devices
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AD9216BCPZ-65 Datasheet PDF : 40 Pages
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD9216
AGND 1
VIN+_A 2
VIN–_A 3
AGND 4
AVDD 5
REFT_A 6
REFB_A 7
VREF 8
SENSE 9
REFB_B 10
REFT_B 11
AVDD 12
AGND 13
VIN–_B 14
VIN+_B 15
AGND 16
PIN 1
INDICATOR
AD9216
TOP VIEW
(Not to Scale)
48 D2_A
47 D1_A
46 D0_A (LSB)
45 DNC
44 DNC
43 DNC
42 DNC
41 DRVDD
40 DRGND
39 DNC
38 D9_B (MSB)
37 D8_B
36 D7_B
35 D6_B
34 D5_B
33 D4_B
DNC =
DO NOT CONNECT
Figure 3. Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
Mnemonic Description
1, 4, 13, 16 AGND1
Analog Ground.
2
VIN+_A
Analog Input Pin (+) for Channel A.
3
VIN−_A
Analog Input Pin (−) for Channel A.
5, 12, 17, 64 AVDD
Analog Power Supply.
6
REFT_A
Differential Reference (+) for Channel A.
7
REFB_A
Differential Reference (−) for Channel A.
8
VREF
Voltage Reference Input/Output.
9
SENSE
Reference Mode Selection.
10
REFB_B
Differential Reference (−) for Channel B.
11
REFT_B
Differential Reference (+) for Channel B.
14
VIN−_B
Analog Input Pin (−) for Channel B.
15
VIN+_B
Analog Input Pin (+) for Channel B.
18
CLK_B
Clock Input Pin for Channel B.
19
DCS
Duty Cycle Stabilizer (DCS) Mode Pin (Active High).
20
DFS
Data Output Format Select Pin. Low for offset binary; high for twos complement.
21
PDWN_B
Power-Down Function Selection for Channel B.
Logic 0 enables Channel B.
Logic 1 powers down Channel B. (Outputs static, not High-Z.)
22
OEB_B
Output Enable for Channel B.
Logic 0 enables Data Bus B.
Logic 1 sets outputs to High-Z.
23 to 26, 39, DNC
42 to 45, 58
Do Not Connect Pins. Should be left floating.
27, 30 to 38 D0_B (LSB) to Channel B Data Output Bits.
D9_B (MSB)
28, 40, 53
DRGND
Digital Output Ground.
29, 41, 52
DRVDD
Digital Output Driver Supply. Must be decoupled to DRGND with a minimum 0.1 µF capacitor.
Recommended decoupling is 0.1 µF capacitor in parallel with 10 µF.
Rev. A | Page 9 of 40
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