PHD98N03LT,118 Просмотр технического описания (PDF) - NXP Semiconductors.

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PHD98N03LT,118

N-channel TrenchMOS logic level FET

NXP Semiconductors. 

NXP Semiconductors

PHD98N03LT

N-channel TrenchMOS logic level FET

5. Thermal characteristics

Table 4. Thermal characteristics

Symbol Parameter

Conditions

Min Typ Max Unit

Rth(j-mb)

Rth(j-a)

thermal resistance from junction to mounting base see Figure 4

thermal resistance from junction to ambient

SOT428

minimum footprint

-

-

1.35 K/W

-

75 -

K/W

SOT404 minimum footprint [1] -

50 -

K/W

[1] Mounted on a printed-circuit board; vertical in still air.

10

Zth(j-mb)

(K/W)

003aab657

1

δ = 0.5

0.2

10-1 0.1

0.05

0.02

10-2

single pulse

P

δ = tp

T

10-3

10-5

10-4

10-3

10-2

10-1

tp

T

1

tp (s)

t

10

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration

PHD98N03LT_5

Product data sheet

Rev. 05 — 1 December 2006

© NXP B.V. 2006. All rights reserved.

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