HEF4046B(2016) Просмотр технического описания (PDF) - NXP Semiconductors.
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HEF4046B Datasheet PDF : 19 Pages
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HEF4046B
Phase-locked loop
10. Dynamic characteristics
Table 6. Dynamic characteristics
VSS = 0 V; Tamb = 25 C; CL = 50 pF; input transition times 20 ns.
Symbol Parameter
Conditions
Phase comparators
VDD
Min Typ Max Unit
RI
input resistance
SIG_IN input; at self-bias operating point 5 V
-
750
- k
10 V
-
220
- k
15 V
-
140
- k
Vi(sens) input voltage
sensitivity
SIG_IN input A.C. coupled; peak-to-peak 5 V
values; R1 = 10 k; R2 = ; C1 = 100 pF; 10 V
independent of the lock range
15 V
-
150
- mV
-
150
- mV
-
200
- mV
VIL
LOW-level input
SIG_IN and COMP_IN inputs, DC
5V
voltage
coupled LOW; full temperature range
10 V
-
-
1.5 V
-
-
3.0 V
15 V
-
-
4.0 V
VIH
HIGH-level input
SIG_IN and COMP_IN inputs, D.C.
5V
voltage
coupled HIGH; full temperature range
10 V
3.5
-
7.0
-
-V
-V
15 V
11.0
-
-V
IIH
HIGH-level input
SIG_IN input; at VDD
current
5V
10 V
-
7
- A
-
30
- A
15 V
-
70
- A
IIL
LOW-level input
SIG_IN input; at VSS
current
5V
10 V
-
3
- A
-
18
- A
15 V
-
45
- A
VCO
P
power dissipation
f0 = 10 kHz; R1 = 1 M; R2 = ;
5V
-
150
- W
VCO_IN at 0.5 VDD; see Figure 10 to 12 10 V
- 2500 - W
15 V
- 9000 - W
fmax
maximum frequency VCO_IN at VDD;
R1 = 10 k; R2 = ; C1 = 50 pF
5V
10 V
0.5 1.0
1.0 2.0
- MHz
- MHz
15 V
1.3 2.7
- MHz
f/T
frequency variation no frequency offset (fmin = 0 Hz)
with temperature
5 V [1] - 0.22 to - % Hz/C
0.30
10 V [1] - 0.04 to - % Hz/C
0.05
15 V [1] - 0.01 to - % Hz/C
0.05
with frequency offset (fmin > 0 Hz)
5 V [1] -
0 to
0.22
- % Hz/C
10 V [1] -
0 to
0.04
- % Hz/C
15 V [1] -
0 to
0.01
- % Hz/C
HEF4046B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 24 March 2016
© Nexperia B.V. 2017. All rights reserved
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