AT91SAM7S128-MU(2008) Просмотр технического описания (PDF) - Atmel Corporation
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AT91SAM7S128-MU Datasheet PDF : 50 Pages
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AT91SAM7S Series Summary
1. Description
Atmel’s AT91SAM7S is a series of low pincount Flash microcontrollers based on the 32-bit ARM
RISC processor. It features a high-speed Flash and an SRAM, a large set of peripherals, includ-
ing a USB 2.0 device (except for the AT91SAM7S32 and AT91SAM7S16), and a complete set
of system functions minimizing the number of external components. The device is an ideal
migration path for 8-bit microcontroller users looking for additional performance and extended
memory.
The embedded Flash memory can be programmed in-system via the JTAG-ICE interface or via
a parallel interface on a production programmer prior to mounting. Built-in lock bits and a secu-
rity bit protect the firmware from accidental overwrite and preserves its confidentiality.
The AT91SAM7S Series system controller includes a reset controller capable of managing the
power-on sequence of the microcontroller and the complete system. Correct device operation
can be monitored by a built-in brownout detector and a watchdog running off an integrated RC
oscillator.
The AT91SAM7S Series are general-purpose microcontrollers. Their integrated USB Device
port makes them ideal devices for peripheral applications requiring connectivity to a PC or cellu-
lar phone. Their aggressive price point and high level of integration pushes their scope of use far
into the cost-sensitive, high-volume consumer market.
1.1 Configuration Summary of the AT91SAM7S512, AT91SAM7S256, AT91SAM7S128,
AT91SAM7S64, AT91SAM7S321, AT91SAM7S32, AT91SAM7S161 and AT91SAM7S16
The AT91SAM7S512, AT91SAM7S256, AT91SAM7S128, AT91SAM7S64, AT91SAM7S321,
AT91SAM7S32, AT91SAM7S161 and AT91SAM7S16 differ in memory size, peripheral set and
package. Table 1-1 summarizes the configuration of the six devices.
Except for the AT91SAM7S32/16, all other AT91SAM7S devices are package and pinout
compatible.
Table 1-1.
Device
Configuration Summary
Flash
Flash
TWI
Organization SRAM
USB
External
Device
Interrupt PDC
TC
I/O 5V I/O
Port USART Source Channels Channels Tolerant Lines
AT91SAM7S512 512 Kbytes Master dual plane 64 Kbytes 1
2(1) (2) 2
11
3
Yes
32
AT91SAM7S256 256 Kbytes Master single plane 64 Kbytes 1
2(1) (2) 2
11
3
Yes
32
AT91SAM7S128 128 Kbytes Master single plane 32 Kbytes 1
2(1) (2) 2
11
3
Yes
32
AT91SAM7S64 64 Kbytes Master single plane 16 Kbytes 1
2(2)
2
11
3
Yes
32
AT91SAM7S321 32 Kbytes Master single plane 8 Kbytes 1
2(2)
2
AT91SAM7S32 32 Kbytes Master
single plane
8 Kbytes
not
present
1
1
AT91SAM7S161 16 Kbytes
Master/
Slave
single plane 4 Kbytes 1
2(2)
2
AT91SAM7S16 16 Kbytes
Master/
Slave
single plane
4 Kbytes
not
present
1
1
Notes: 1. Fractional Baud Rate.
2. Full modem line support on USART1.
3. Only two TC channels are accessible through the PIO.
11
3
Yes
32
9
3(3)
Yes
21
11
3
No
32
9
3(3)
No
21
Package
LQFP/
QFN 64
LQFP/
QFN 64
LQFP/
QFN 64
LQFP/
QFN 64
LQFP/
QFN 64
LQFP/
QFN 48
LQFP
LQFP/
QFN 48
3
6175GS–ATARM–24-Dec-08
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