DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

AT91SAM9R64(2008) Просмотр технического описания (PDF) - Atmel Corporation

Номер в каталоге
Компоненты Описание
производитель
AT91SAM9R64
(Rev.:2008)
Atmel
Atmel Corporation Atmel
AT91SAM9R64 Datasheet PDF : 911 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AT91SAM9R64/RL64 Preliminary
– Master, Multi-master and Slave Mode Operation
– Bit Rate: Up to 400 Kbits
– General Call Supported in Slave Mode
– Connection to Peripheral DMA Controller (PDC) Channel Capabilities Optimizes Data Transfers in Master Mode Only
(TWI0 only)
SAM-BABoot Assistant
– Default Boot Program
– Interface with SAM-BA Graphic User Interface
IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins
Required Power Supplies:
– 1.08 to 1.32V for VDDCORE, VDDUTMIC, VDDPLLB and VDDBU
– 3.0V to 3.6V for VDDPLLA, VDDANA, VDDUTMII and VDDIOP
– Programmable 1.65V to 1.95V or 3.0V to 3.6V for VDDIOM
Available in a 144-ball BGA (AT91SAM9R64) and a 217-ball LFBGA (AT91SAM9RL64) Package
1. Description
The AT91SAM9R64/RL64 device is based on the integration of an ARM926EJ-S processor with
a large fast SRAM and a wide range of peripherals.
The AT91SAM9R64/RL64 embeds one USB Device High Speed Controller, one LCD Controller
(for AT91SAM9RL64 only), one AC97 controller, a 2-channel DMA Controller, four USARTs, two
SSCs, one SPI, two TWIs, three Timer Counter channels, a 4-channel PWM generator, one Mul-
timedia Card interface and a 6-channel Analog-to-digital converter that also provides touch
screen management.
The AT91SAM9R64/RL64 is architectured on a 6-layer bus matrix. It also features an External
Bus Interface capable of interfacing with a wide range of memory and peripheral devices.
Some features are not available for AT91SAM9R64 in the 144-ball BGA package.
Separate block diagrams and PIO multiplexing are provided in this document. Table 1-1 lists the
features and signals of AT91SAM9RL64 that are not available or partially available for
AT91SAM9R64. When the signal is multiplexed on a PIO, the PIO line is specified.
Table 1-1.
Feature
AC97
EBI
LCDC
Unavailable or Partially Available Features and Signals in AT91SAM9R64
Full/Partial
Signal
Peripheral A
Peripheral B
AC97FS
AC97CK
Full
AC97TX
AC97RX
PD1
PD2
-
PD3
PD4
Partial
D16-D31
NCS2
NCS5/CFCS1
PB16-PB31
PD0
-
PD13
LCDMOD
PC2
LCDCC
PC3
LCDVSYNC
PC4
Full
LCDHSYNC
PC5
-
LCDDOTCK
PC6
LCDDEN
PC7
LCDD0-LCDD23
PC8-PC31
3
6289A–ATARM–15-Jan-08

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]