AT91SAM9R64(2008) Просмотр технического описания (PDF) - Atmel Corporation

Номер в каталоге

Компоненты Описание

производитель

AT91SAM9R64
(Rev.:2008)

AT91 ARM Thumb Microcontrollers

Atmel Corporation 

Features

• Incorporates the ARM926EJ-S™ ARM® Thumb® Processor

– DSP Instruction Extensions

– ARM Jazelle® Technology for Java® Acceleration

– 4 Kbyte Data Cache, 4 Kbyte Instruction Cache, Write Buffer

– 210 MIPS at 190 MHz

– Memory Management Unit

– EmbeddedICE™ In-circuit Emulation, Debug Communication Channel Support

– Mid-level implementation Embedded Trace Macrocell™

• Multi-layer AHB Bus Matrix for Large Bandwidth Transfers

– Six 32-bit-layer Matrix

– Boot Mode Select Option, Remap Command

• One 32-KByte internal ROM, Single-cycle Access at Maximum Speed

• One 64-KByte internal SRAM, Single-cycle Access at Maximum Speed

– 4 Blocks of 16 Kbytes Configurable in TCM or General-purpose SRAM on the AHB

Bus Matrix

– Single-cycle Accessible on AHB Bus at Bus Speed

– Single-cycle Accessible on TCM Interface at Processor Speed

• 2-channel DMA

– Memory to Memory Transfer

– 16 Bytes FIFO

– LInked List

• External Bus Interface (EBI)

– EBI Supports SDRAM, Static Memory, ECC-enabled NAND Flash and

CompactFlash®

• LCD Controller (for AT91SAM9RL64 only)

– Supports Passive or Active Displays

– Up to 24 Bits per Pixel in TFT Mode, Up to 16 bits per Pixel in STN Color Mode

– Up to 16M Colors in TFT Mode, Resolution Up to 2048x2048, Virtual Screen

Support

• High Speed (480 Mbit/s) USB 2.0 Device Controller

– On-Chip High Speed Transceiver, UTMI+ Physical Interface

– Integrated FIFOs and Dedicated DMA

– 4 Kbyte Configurable Integrated DPRAM

• Fully-featured System Controller, including

– Reset Controller, Shutdown Controller

– Four 32-bit Battery Backup Registers for a Total of 16 Bytes

– Clock Generator and Power Management Controller

– Advanced Interrupt Controller and Debug Unit

– Periodic Interval Timer, Watchdog Timer and Real-time Timer and Real-time Clock

• Reset Controller (RSTC)

– Based on Two Power-on Reset Cells

– Reset Source Identification and Reset Output Control

• Shutdown Controller (SHDC)

– Programmable Shutdown Pin Control and Wake-up Circuitry

• Clock Generator (CKGR)

– Selectable 32768 Hz Low-power Oscillator or Internal Low-power RC Oscillator on

Battery Backup Power Supply, Providing a Permanent Slow Clock

– 12 MHz On-chip Oscillator for Main System Clock and USB Clock

AT91 ARM

Thumb

Microcontrollers

AT91SAM9R64

AT91SAM9RL64

Preliminary

6289A–ATARM–15-Jan-08

Share Link: