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SIT9102AI-443N18S Просмотр технического описания (PDF) - Unspecified

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SIT9102AI-443N18S Datasheet PDF : 13 Pages
First Prev 11 12 13
SiT9102
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Oscillator
SiT9102
OUT+
Drive Device
OUT-
Z0 = 50 Ohm
Z0 = 50 Ohm
50 Ohm
50 Ohm
D+
Receiver Device
D-
VDD <VT < 3.63V
Figure 7. CML Single Load Termination
S iT 9 1 0 2
OUT+
Drive Device
OUT-
50 Ohm
A
Z0 = 50 Ohm
A
Z0 = 50 Ohm
50 Ohm
50
Ohm
B
D+
B
D-
50 Ohm
R e c e iv e r
D e v ic e
VDD < VT1 < 3.63V
VDD <VT2 < 3.63V
N o te s:
1. For D C -coupled operation, VT1 = VT2
2. For AC coupled operation, include/insert decoupling caps at points A or B
2. For AC -coupled operation w ith capacitors placed at point A, V T2 sets the input com m on m ode of R eceiver D evice and need
not to be related to VT1
Figure 8. CML Double Load Termination
Rev. 1.52
Page 11 of 13
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