74LVC1284D,112 Просмотр технического описания (PDF) - NXP Semiconductors.
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74LVC1284D,112 Datasheet PDF : 10 Pages
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Philips Semiconductors
3.3V Parallel printer interface transceiver/buffer
Product specification
74LVC1284
VCC
PULSE
GENERATOR
VIN
RT
D.U.T.
VOUT
Test Circuit for Bn or Yn Outputs
50pF
S1
VCC
GND
RL = 500Ω tPLH/PHL
= 62Ω for SR test
SWITCH POSITION
Bn or Yn Outputs
TEST
tPLH
tPHL
SWITCH
GND
VCC
VCC
VIN
PULSE
GENERATOR
D.U.T
VOUT
RT
CL
RL
Test Circuit for An Outputs
DEFINITIONS
CL = Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
RL = Load resistor; see AC CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
90%
NEGATIVE
PULSE
POSITIVE
PULSE
10%
tW
VM
10%
VM
10%
tTHL (tf)
tTLH (tr)
90%
VM
90%
VM
tW
VM = 1.5V
Input Pulse Definition
90% AMP (V)
0V
tTHL (tf)
tTLH (tr)
AMP (V)
10%
0V
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude Rep. Rate tW
tr
tf
74LVC
3.0V
1MHz 500ns 3ns 3ns
Waveform 5.
SY00004
VI
PULSE
GENERATOR
VCC
D.U.T.
RT
VO
CL 50pF
S1
500Ω
2 x VCC
Open
GND
500Ω
TEST CIRCUIT
VCC
D.U.T.
IO
VCC/2
VCC
t 2.7V
2.7V – 3.6V
VI
VCC
2.7V
Test
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
2 x VCC
GND
SY00003
Figure 1. Load Circuitry for Bn to An Switching Times
IO is measured by forcing VCC/2 on the output. RD can then
be calculated using the equation RD = VCC/2 ť IO ť.
SY00005
Figure 2. Output Impedance RD
1995 Nov 10
6
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