Document Revision History
Version History
Description of Change
Rev 14.0
Rev 15.0
Rev. 16
Rev. 17
Added information/corrected state during reset in Table 2-2. Clarified external reference crystal
frequency for PLL in Table 10-14 by increasing maximum value to 8.4MHz.
Replaced “Tri-stated” with an explanation in State During Reset column in Table 2-2.
• Added the following note to the description of the TMS signal in Table 2-2:
Note: Always tie the TMS pin to VDD through a 2.2K resistor.
• Added the following note to the description of the TRST signal in Table 2-2:
Note: For normal operation, connect TRST directly to VSS. If the design is to be used in a debugging
environment, TRST may be tied to VSS through a 1K resistor.
Changed the “Frequency Accuracy” specification in Table 10-16 (was ±2.0%, is +2 / -3%).
Please see http://www.freescale.com for the most current data sheet revision.
56F8323 Technical Data, Rev. 17
Freescale Semiconductor
3
Preliminary