AD632S Просмотр технического описания (PDF) - Analog Devices
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AD632S Datasheet PDF : 12 Pages
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AD632
OPERATION AS A MULTIPLIER
Figure 7 shows the basic connection for multiplication. Note
that the circuit meets all specifications without trimming.
X INPUT
±10V FS
±12V PK
Y INPUT
±10V FS
±12V PK
X1
X2
VOS
Y1
Y2
+VS
OUT
Z1
Z2
–VS
+15V
OUTPUT, ±12V PK
=
(X1
–
X2) (Y1
10
–
Y2)
+
Z2
OPTIONAL SUMMING
INPUT, Z, ±10V PK;
VOS TERMINAL
NOT USED
–15V
Figure 7. Basic Multiplier Connection
When needed, the user can reduce ac feedthrough to a minimum
(as in a suppressed carrier modulator) by applying an external
trim voltage (±30 mV range required) to the X or Y input. Figure 4
shows the typical ac feedthrough with this adjustment mode.
Note that the feedthrough of the Y input is a factor of 10 lower
than that of the X input and is to be used for applications where
null suppression is critical.
The Z2 terminal of the AD632 can be used to sum an additional
signal into the output. In this mode, the output amplifier behaves
as a voltage follower with a 1 MHz small signal bandwidth and
a 20 V/μs slew rate. Always reference this terminal to the ground
point of the driven system, particularly if this is remote. Like-
wise, reference the differential inputs to their respective signal
common potentials to realize the full accuracy of the AD632.
Data Sheet
A much lower scaling voltage can be achieved without any reduc-
tion of input signal range using a feedback attenuator, as shown
in Figure 8. In this example, the scale is such that VOUT = XY, so
that the circuit can exhibit a maximum gain of 10. This connection
results in a reduction of bandwidth to about 80 kHz without the
peaking capacitor, CF. In addition, the output offset voltage is
increased by a factor of 10 making external adjustments necessary
in some applications.
Feedback attenuation also retains the capability for adding a
signal to the output. Signals can be applied to the Z terminal,
where they are amplified by −10, or to the common ground
connection where they are amplified by −1. Input signals can
also be applied to the lower end of the 2.7 kΩ resistor, giving a
gain of +9.
X INPUT
±10V FS
±12V PK
Y INPUT
±10V FS
±12V PK
X1
+VS
X2
OUT
Z1
Z2
Y1
VOS
Y2
–VS
+15V
OUTPUT, ±12V PK
= (X1 – X2) (Y1 – Y2)
(SCALE = 1)
–15V
Figure 8. Connections for Scale Factor of Unity
Rev. D | Page 8 of 12
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