HIP5020 Просмотр технического описания (PDF) - Intersil

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HIP5020

Integrated-Power Buck Converter Controller with Synchronous Rectification

Intersil 

HIP5020

increases and the converter operates in Hysteretic mode.

The lower error amplifier limit is the voltage on the HMI

(Hysteretic Mode Current) pin. The HMI level (VHMI) sets

the Run-to-Hysteretic mode load current boundary.

HYSTERETIC

MODE

VHMI

RUN

MODE

CURRENT

LIMIT

OUTPUT LOAD

FIGURE 6. OPERATING MODES WITH THE ERROR

AMPLIFIER CLAMPS

Hysteretic Mode

The HIP5020 operates in the hysteretic mode with low

output current. In this mode, the hysteretic comparator

cycles the control on (RUN = High) and off (RUN = Low) as a

function of the output voltage and the FB voltage level.

Figure 7 illustrates the averaged Hysteretic Mode operation

with reference to Figure 5. At light load, the error amplifier

output voltage is held to the HMI voltage (VHMI). This level

commands an inductor current that exceeds the load

current. The excess current flows into the output capacitor

which increases the output voltage (VO). The voltage

feedback loop no longer holds VFB at the reference voltage.

When VFB increases to the Upper Hysteretic Trip Level, the

RUN signal transitions Low to power-down most of the

control’s functions, and the load is supplied by the output

capacitor. After VFB (and the equivalent output voltage)

drops below the Lower Hysteretic Trip Level, RUN transitions

High, turning on the controller. The converter replenishes the

charge on the output capacitor (C1). This cycle repeats to

regulate the output voltage.

VO

2∆

VO

REF

RUN

TIME

FIGURE 7. TYPICAL HYSTERETIC MODE OPERATION

The HIP5020 maintains peak-current control during

Hysteretic mode. When the RUN signal transitions High, the

control functions reenergize and the oscillator sets the PWM

Latch which turns-on the high side MOSFET. The inductor

current increases and resets the PWM latch to turn off the

MOSFET. This cycle-by-cycle operation is identical to the

Run mode operation. However, in hysteretic mode, the

inductor current is regulated to a level proportional to VHMI.

With very light loads, the converter replenishes the output

capacitor charge in a few switching cycles (RUN = High) and

the converter dissipates very little average power. Operation

automatically transitions to Run mode as the load increases

above the Run-to-Hysteretic mode load current boundary;

the RUN signal simply stays High.

The output voltage ripple during Hysteretic Mode is a

function of the HMI (Hysteretic Mode Current) setting, output

capacitor ESR, and the hysteretic voltage trip points. The

approximate ripple voltage is:

VHMI • 1.7 • ESR + 2 • ∆ • (R1 ⁄ R2 + 1)

Where 2 ∆ is the hysteresis width (~20mV) and the 1.7 (A/V)

factor is the error amplifier output voltage to peak current

control gain (modulator gain).

Protective Modes

The HIP5020 provides cycle-by-cycle current limiting and

protects against over-current. The cycle-by-cycle current

limit reduces the pulse width (duty factor) for peak inductor

current levels exceeding the current limit (4A minimum). This

results in a constant current output characteristic. The OVLD

pin toggles high to indicate an overload condition. Should

the current limit cause a small pulse width due to a

saturating output inductor, over-current protection activates a

soft-start cycle. The simultaneous occurrence of a minimum

pulse width and a current limit signals an over-current

condition. The converter enters the start-up mode by fully

discharging the soft-start capacitor and inhibiting PWM

operation. With a continuous overload, the over-current

protection triggers the soft-start function which inhibits PWM

operation until after the soft-start capacitor first fully charges

to VCC and then fully discharges. This results in a very low

average input current.

Soft-Start

The soft-start function is programmed by a capacitor on the

SOFT pin (C10). This capacitor is initially discharged.

Releasing the SD pin, or increasing VCC above the under-

voltage lockout threshold initiates a soft-start interval. As the

internal 10µA source charges C10, the converter output

follows the capacitor voltage, VSOFT. The control establishes

closed loop regulation when the output voltage approaches

the level set by R1, R2 and the reference.

Initiating shutdown mode rapidly discharges capacitor C10.

Releasing the SD pin initiates another start-up mode which

charges up the capacitor C10 to VCC.

Should the VFB exceed the upper hysteretic trip level, the

internal 10µA source stops charging C10. The soft-start

interval will resume when VFB drops below the lower

hysteretic trip level.

2-21

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