ITG3200 Просмотр технического описания (PDF) - Unspecified
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ITG3200 Datasheet PDF : 39 Pages
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ITG-3200 Product Specification
Document Number: PS-ITG-3200A-00-01.4
Revision: 1.4
Release Date: 03/30/2010
3.5 I2C Timing Characterization
Typical Operating Circuit of Section 4.2, VDD = 2.5V, VLOGIC = 1.8V±5%, 2.5V±5%, 3.0V±5%, or 3.3V±5%,
TA=25°C.
Parameters
I2C TIMING
fSCL, SCL Clock Frequency
tHD.STA, (Repeated) START Condition Hold Time
Conditions
I2C FAST-MODE
Min
Typical
Max
Units Notes
0
400
kHz
1
0.6
us
1
tLOW, SCL Low Period
1.3
tHIGH, SCL High Period
0.6
tSU.STA, Repeated START Condition Setup Time
0.6
tHD.DAT, SDA Data Hold Time
tSU.DAT, SDA Data Setup Time
tr, SDA and SCL Rise Time
tf, SDA and SCL Fall Time
tSU.STO, STOP Condition Setup Time
tBUF, Bus Free Time Between STOP and START
Condition
Cb, Capacitive Load for each Bus Line
tVD.DAT, Data Valid Time
tVD.ACK, Data Valid Acknowledge Time
Cb bus cap. from 10 to 400pF
Cb bus cap. from 10 to 400pF
0
100
20+0.1Cb
20+0.1Cb
0.6
1.3
us
1
us
1
us
1
us
1
ns
1
300
ns
1
300
ns
1
us
1
us
1
400
pF
2
0.9
us
1
0.9
us
1
Notes:
1. Based on characterization of 5 pieces over temperature on evaluation board or in socket
2. Guaranteed by design
I2C Bus Timing Diagram
11 of 39
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