AU80610006225AASLBXC Просмотр технического описания (PDF) - Intel

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AU80610006225AASLBXC

Intel® Atom™ Processor D400 and D500 Series

Intel 

Figures

Figure 1-1

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Figure 8-5

Figure 8-6

Figure 8-7

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Figure 8-9

Intel Atom Processor D400 and D500 Series System Block Diagram .............. 14

VCC Tolerance Band ............................................................................... 43

Idle Power Management Breakdown of the Processor Cores.......................... 56

Thread and Core C-state ......................................................................... 56

Package Mechanical Drawings .................................................................. 66

Package Pinmap (Top View, Upper-Left Quadrant) ...................................... 67

Package Pinmap (Top View, Upper-Right Quadrant) .................................... 68

Package Pinmap (Top View, Lower-Left Quadrant) ...................................... 69

Package Pinmap (Top View, Lower-Right Quadrant) .................................... 70

Tables

Table 1-1

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Table 2-6

Table 2-7

Table 2-8

Table 2-9

Table 2-10

Table 2-11

Table 2-12

Table 2-13

Table 2-14

Table 2-15

Table 2-16

Table 3-17

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Table 3-20

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Table 3-22

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Table 3-24

Table 4-25

Table 4-26

Table 4-27

Table 4-28

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Table 4-33

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Table 4-35

Table 4-36

References ............................................................................................ 13

Signal Type ........................................................................................... 15

Signal Description Buffer Types ................................................................ 15

CPU Legacy Signal .................................................................................. 16

Memory Channel A ................................................................................. 19

Memory Reference and Compensation ....................................................... 20

Reset and Miscellaneous Signal ................................................................ 20

DMI - Processor to Intel NM10 Express Chipset Serial Interface .................... 21

PLL Signals ............................................................................................ 21

Analog Display Signals ............................................................................ 22

LVDS Signals ......................................................................................... 23

JTAG/ITP Signals .................................................................................... 24

Error and Thermal Protection ................................................................... 24

Processor Core Power Signals................................................................... 25

Power Signals ........................................................................................ 25

Ground ................................................................................................. 26

Analog Port Characteristics ...................................................................... 32

Targeted Memory State Conditions ........................................................... 34

Platform System States........................................................................... 34

Processor Power States ........................................................................... 34

Graphics Processing Unit ......................................................................... 35

Main Memory States ............................................................................... 35

G, S and C State Combinations ................................................................ 35

D, S and C State Combinations ................................................................ 35

Voltage Identification Definition ................................................................ 39

VID Pin Mapping..................................................................................... 40

Processor Absolute Minimum and Maximum Ratings .................................... 42

Processor Core Active and Idle Mode DC Voltage and Current Specifications ... 44

Processor Uncore I/O Buffer Supply DC Voltage and Current Specifications..... 45

Input Clocks (BCLK, HPL_CLKIN, DPL_REFCLKIN, EXP_CLKIN) Differential

Specification .......................................................................................... 47

DDR2 Signal Group DC Specifications ........................................................ 47

GTL Signal Group DC Specifications .......................................................... 48

Legacy CMOS Signal Group DC Specification .............................................. 49

Open Drain Signal Group DC Specification.................................................. 49

PWROK and RSTIN# DC Specification........................................................ 50

CPUPWRGOOD DC Specification................................................................ 50

Datasheet

5

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