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XRT83VSH316ES

IC LIU SH T1/E1/J1 16CH 316STBGA

Exar Corporation 

REV. 1.0.2

MICROPROCESSOR

NAME

PIN

CSdec2

U17

CSdec1

F16

CSdec0

E16

DATA7

DATA6

DATA5

DATA4

DATA3

DATA2

DATA1

DATA0

PTYPE2

PTYPE1

PTYPE0

U5

V5

V4

W4

W3

Y3

Y2

Y5

W19

W2

U4

Reset

D16

CS5

C16

CS4

C17

CS3

B17

CS2

B18

CS1

A18

GPIO1

T16

GPIO0

R16

XRT83VSH316

16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT

TYPE

I

I/O

DESCRIPTION

Chip Select Decoder Input Pins [2:0]

CSdec[2:0] are used as a chip select decoder. The LIU has 5 chip select out-

put pins for enabling up to 5 additional devices for accessing internal registers.

The LIU has the option to select itself (master device), up to 5 additional

devices, or all 6 devices simultaneously by setting the CSdec[2:0] pins speci-

fied below.

000 = Master Device

001 = Chip Select Output 1

010 = Chip Select Output 2

011 = Chip Select Output 3

100 = Chip Select Output 4

101 = Chip Select Output 5

110 = Reserved

111 = All Chip Selects Active Including the Master Device

Internally pulled "Low" with a 50k  resistor.

Bi-directional Data Bus

DATA[7:0] is a bi-directional data bus used for read and write operations.

NOTE: Internally pulled "Low" with a 50k  resistor.

I

Microprocessor Type Select Input

PTYPE[2:0] are used to select the microprocessor type interface.

000 = Intel 8051 Asynchronous

001 = Motorola Asynchronous

101 = Power PC Synchronous

111 = MPC8xx Motorola Synchronous

NOTE: Internally pulled "Low" with a 50k  resistor.

I

Hardware Reset Input

Active low signal. When this pin is pulled "Low" for more than 10µS, the inter-

nal registers are set to their default state. See the register description for the

default values.

NOTE: Internally pulled "High" with a 50K resistor.

O

Chip Select Output

The XRT83VSH316 can be used to provide the necessary chip selects for up

to 5 additional devices by using the CSdec[2:0] input pins. The LIU allows up

to 84-channel applications with only using one chip select. See the CSdec[2:0]

definition in the pin description.

I/O

General Purpose Input/Output

These two GPIO pins are controlled through the internal registers in the micro-

processor block. One register controls the direction, while the other register is

used to store or retrieve the status of these pins.

4

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