TC74A0-3.3VCTTRG Просмотр технического описания (PDF) - Microchip Technology

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производитель

TC74A0-3.3VCTTRG

Tiny Serial Digital Thermal Sensor

Microchip Technology 

TC74

Write Byte Format

S

Address

7 Bits

Slave Address

WR

ACK

Command

ACK

Data ACK

P

8 Bits

8 Bits

Command Byte: selects

which register you are

writing to.

Data Byte: data goes

into the register set

by the command byte.

Read Byte Format

S Address WR ACK Command ACK S Address RD ACK Data NACK P

7 Bits

8 Bits

7 Bits

8 Bits

Slave Address

Command Byte: selects

which register you are

reading from.

Slave Address: repeated

due to change in data-

flow direction.

Data Byte: reads from

the register set by the

command byte.

Receive Byte Format

S Address RD ACK Data NACK P

7 Bits

8 Bits

S = START Condition

P = STOP Condition

Shaded = Slave Transmission

Data Byte: reads data from

the register commanded by

the last Read Byte or Write

Byte transmission.

FIGURE 3-1:

SMBus/I2C Protocols.

3.3 START Condition (S)

The TC74 continuously monitors the SDA and SCLK

lines for a START condition (a high-to-low transition of

SDA while SCLK is high) and will not respond until this

condition is met.

3.4 Address Byte

Immediately following the START condition, the host

must transmit the address byte to the TC74. The states

of A2, A1 and A0 determine the SMBus/I2C address for

the TC74. The 7-bit address transmitted in the serial bit

stream must match for the TC74 to respond with an

Acknowledge (indicating the TC74 is on the bus and

ready to accept data). The 8-bit in the address byte is a

Read/Write bit. This bit is a ‘1’ for a read operation or

‘0’ for a write operation. During the first phase of any

transfer, this bit will be set = 0, indicating that the

command byte is being written.

3.6 Data Byte

After a successful ACK of the address byte, the host

must transmit the data byte to be written, or clock-in the

data to be read (see the appropriate timing diagrams).

ACK will be generated upon a successful write of a data

byte into the TC74.

3.7 STOP Condition (P)

Communications must be terminated by a STOP

condition (a low-to-high transition of SDA while SCLK

is high). The STOP condition must be communicated

by the transmitter to the TC74. Refer to Figure 1-1,

“Timing Diagrams”, for serial bus timing.

3.5 Acknowledge (ACK)

Acknowledge (ACK) provides a positive handshake

between the host and the TC74. The host releases

SDA after transmitting 8 bits. The host then generates

a ninth clock cycle to allow the TC74 to pull the SDA

line low. This action acknowledges that the TC74

successfully received the previous 8 bits of data or

address.

 2001-2012 Microchip Technology Inc.

DS21462D-page 7

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