MAX8564 Просмотр технического описания (PDF) - Maxim Integrated

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MAX8564

±1%, Ultra-Low Output Voltage, Dual and Triple Linear n-FET Controllers

Maxim Integrated 

±1%, Ultra-Low Output Voltage, Dual and Triple

Linear n-FET Controllers

Pin Description (continued)

NAME

PIN

MAX8563

MAX8564/

MAX8564A

FUNCTION

—

7

DRV3

—

8

FB3

—

9

EN3

—

10

POK3

11

N.C.

12

POK2

13

EN2

14

FB2

15

DRV2

16

VDD

EN2

—

FB2

—

DRV2

—

VDD

—

—

—

—

—

—

—

Enable Control for Output 2. Drive logic high to enable output 2, or logic low to disable the

output. Connect to VDD for always-on operation.

Output 3 n-MOSFET Drive. Drives the gate of an external n-channel MOSFET to regulate output 3.

DRV3 is internally pulled to ground when EN3 is logic low. Connect an external series RC circuit

for compensation. See the Stability Compensation section.

Feedback Input for Output 2. Connect to the center of a resistor-divider between output 2 and

GND to set the output voltage of output 2. The feedback regulation voltage is 0.500V. See the

Output Voltage Setting section.

Feedback Input for Output 3. Connect to the center of a resistor-divider between output 3 and

GND to set the output voltage of output 3. The feedback regulation voltage is 0.500V. See the

Output Voltage Setting section.

Output 2 n-MOSFET Drive. Drives the gate of the external n-channel MOSFET to regulate output 2.

DRV2 is internally pulled to ground when EN2 is logic low. Connect an external series RC circuit

for compensation. See the Stability Compensation section.

Enable Control for Output 3. Drive logic high to enable output 3, or logic low to disable the

output. Connect to VDD for always-on operation.

+5V or +12V Supply Input. Connect to external +5V or +12V supply rail. Bypass with a 0.1µF

ceramic or larger capacitor.

Output 3 Power-Good Signal. Open-drain output pulls low when output 3 is 12% below the

nominal regulated voltage.

No Internal Connection

Output 2 Power-Good Signal. Open-drain output pulls low when output 2 is 12% below the

nominal regulated voltage.

Enable Control for Output 2. Drive logic high to enable output 2, or logic low to disable the

output. Connect to a VDD for always-on operation.

Feedback Input for Output 2. Connect to the center of a resistor-divider between output 2 and

GND to set the output voltage of output 2. The feedback regulation voltage is 0.500V. See the

Output Voltage Setting section.

Output 2 n-MOSFET Drive. Drives the gate of the external n-channel MOSFET to regulate output 2.

DRV2 is internally pulled to ground when EN2 is logic low. Connect an external series RC circuit

for compensation. See the Stability Compensation section.

+5V or +12V Supply Input. Connect to an external +5V or +12V supply rail. Bypass with a 0.1µF

ceramic or larger capacitor.

6 _______________________________________________________________________________________

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