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NT511740D0J Просмотр технического описания (PDF) - Unspecified

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производитель
NT511740D0J
ETC
Unspecified ETC
NT511740D0J Datasheet PDF : 20 Pages
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NT511740D0J
16MEG : x4
Fast Page Mode DRAM
DESCRIPTION
This is a family of 4,194,304 x 4 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of
memory cells within the same row. Power supply voltage (+5.0V ), refresh cycle (2K Ref), access time (-5 or -6), power
consumption (Normal or Low power) and package type (SOJ) are optional features of this family.
All of this family have CAS -before- RAS refresh, RAS -only refresh and Hidden refresh capabilities. Furthermore, Self-
refresh operation is available in L-version. This 4Mx4 EDO Mode DRAM family is fabricated using NANYA’s advanced
CMOS process to realize high bandwidth, low power consumption and high reliability.
It may be used as main memory unit for microcomputer, high level computer and personal computer .
FEATURES
Fast Page Mode operation .
TTL(5V) compatible inputs and outputs
Single +5V ± 10% power supply
JEDEC Standard pinout
CAS before RAS refresh, hidden refresh, RAS -only refresh capability
Refresh : 2048 cycles / 32 ms
Self-refresh capability (L-ver only)
Multi-bit test mode capability
Available in plastic SOJ packages
PRODUCT FAMILY
Family
NT511740D0J - 50/5L
NT511740D0J - 60/6L
Access Time (Max.)
tRAC tCAC tRC
tPC
50ns 13ns 90ns 35ns
60ns 15ns 110ns 40ns
Active Power
Dissipation
605mW
550mW
Voltage
5V
Package
26(24)-pin
SOJ
REV 1.0 , JULY. 2000
3
© NANYA TECHNOLOGY CORP.
NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice.

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