MSC8122(2006) Просмотр технического описания (PDF) - Freescale Semiconductor
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MSC8122 Datasheet PDF : 88 Pages
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Signals/Connections
Table 1-5. DSI, System Bus, Ethernet, and Interrupt Signals (Continued)
Signal Name
HD60
Type
Input/ Output Host Data Bus 60
Bit 60 of the DSI data bus.
Description
D60
Input/ Output System Bus Data 60
For write transactions, the bus master drives valid data on this line. For read transactions, the slave drives
valid data on this bus.
ETHCOL
Input/ Output Ethernet Collision
In MII mode only, indicates that a collision was detected.
Reserved
HD[61–63]
Input
In RMII mode, this pin is reserved and can be left unconnected.
Input/ Output Host Data Bus 61–63
Bits 61–63 of the DSI data bus.
D[61–63]
Input/ Output System Bus Data 61–63
For write transactions, the bus master drives valid data on this bus. For read transactions, the slave drives
valid data on this bus.
Reserved
HCID[0–2]
HCID3
Input
Input
Input
If the Ethernet port is enabled and multiplexed with the DSI/System bus, these pins are reserved and can
be left unconnected.
Host Chip ID 0–2
With HCID3, carries the chip ID of the DSI. The DSI is accessed only if HCS is asserted and HCID[0–3]
matches the Chip_ID, or if HBCS is asserted.
Host Chip ID 3
With HCI[0–2], carries the chip ID of the DSI. The DSI is accessed only if HCS is asserted and HCID[0–3]
matches the Chip_ID, or if HBCS is asserted.
HA8
HA[11–29]
HWBS[0–3]
Input
Input
Input
Host Bus Address 8
Used by an external host to access the internal address space.
Host Bus Address 11–29
Used by external host to access the internal address space.
Host Write Byte Strobes (In Asynchronous dual mode)
One bit per byte is used as a strobe for host write accesses.
HDBS[0–3]
Input
Host Data Byte Strobe (in Asynchronous single mode)
One bit per byte is used as a strobe for host read or write accesses
HWBE[0–3]
Input
Host Write Byte Enable (In Synchronous dual mode)
One bit per byte is used to indicate a valid data byte for host read or write accesses.
HDBE[0–3]
Input
Host Data Byte Enable (in Synchronous single mode)
One bit per byte is used as a strobe enable for host write accesses
MSC8122 Technical Data, Rev. 13
1-8
Freescale Semiconductor
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