LF3304 Просмотр технического описания (PDF) - LOGIC Devices Incorporated

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Компоненты Описание

производитель

LF3304

Dual Line Buffer/FIFO

LOGIC Devices Incorporated 

DEVICES INCORPORATED

WRITE RESET TIMING

WCLKA

WCLKB

RWA

RWB

AIN11–0

(n-1)

(n)

BIN11–0

(n+1)

tRS

tDS tDH

(n+2)

LF3304

Dual Line Buffer/FIFO

tRH

(0)

(1)

WENA = WENB = LOW

READ RESET TIMING

RCLKA

RCLKB

tRS

tRH

RRA

RRB

tAC

AOUT11–0

(n–2)

(n–1)

(n)

(n+1)

(n+2)

(0)

(0)

(1)

BOUT11–0

RENA = RENB = LOW

OEA = OEB = LOW

PROGRAMMABLE FLAG LOAD TIMING

WCLKA

WCLKB

AIN11–0

BIN11–0

ADDRA

ADDRB

LDA

LDB

WENA

WENB

tDS tDH

PAEx

PAFx

tLDS

tLDH

Video Imaging Products

9

08/16/2000–LDS.3304-F

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