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SPT7852SCU Просмотр технического описания (PDF) - Signal Processing Technologies

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производитель
SPT7852SCU
SPT
Signal Processing Technologies SPT
SPT7852SCU Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
SPT7852
DUAL 10-BIT, 20 MSPS, 160 mW A/D CONVERTER
FEATURES
• Dual 10-Bit/20 MSPS Analog-to-Digital Converter
• Monolithic CMOS
• Internal Track-and-Hold
• Low Power Dissipation: 160 mW
• 4 Vp-p Analog Input Range for Each ADC
• Single +5 Volt Power Supply
with Option for 3.3 V Digital Outputs
• Tri-State, TTL-Compatible Outputs
• Overrange Bit
• Selectable Two’s Complement or Straight Binary Output
APPLICATIONS
• SPT NTSC/PAL Video Chip Set
• Video Set-Top Boxes
• Cellular Base Stations
• QPSK/QAM RF Demodulation
• S-Video Digitizers
• Composite Video Digitizers
• Portable and Handheld Instrumentation
GENERAL DESCRIPTION
The SPT7852 has two 10-Bit CMOS analog-to-digital con-
verters that can sample data at speeds up to 20 MSPS. It
has excellent low noise performance with a very low typical
power dissipation of only 160 mW—that’s the total power
for both converters. The SPT7852 uses a dual configuration
of the proprietary circuit design found in our 10-bit CMOS
single converter family, to achieve its high performance in a
CMOS process.
The SPT7852 is specifically designed for video decoding
applications and is ideal for S-video decoding and decoding
of multiple composite video sources. It is the ADC for the
SPT NTSC/PAL video decoder chip set that includes the
SPT9210 analog video processor and the SPT2110 video
decoder. It also has excellent application in the area of
coherent I/Q demodulation in such applications as QAM
demodulation and TV set-top box converters.
Inputs and outputs are TTL/CMOS-compatible to interface
with TTL/CMOS-logic systems. Output data format is select-
able for either straight binary or two’s complement. The
SPT7852 is available in a 44L TQFP package in commercial
and industrial temperature ranges. It is also available in die
form. For availability of extended temperature ranges,
please contact the factory.
BLOCK DIAGRAM
MSB
Invert
VINA
T/H
ADCA
10
Output
Buffer
Overrange
DA0-9
Reference In
Reference
Ladder
VINB
T/H
ADCB
Clock
Reset
Output
Enable
Timing
Generation
10
Output
Buffer
Overrange
DB0-9
Signal Processing Technologies, Inc.
4755 Forge Road, Colorado Springs, Colorado 80907, USA
Phone: (719) 528-2300 FAX: (719) 528-2370 Website: http://www.spt.com E-Mail: sales@spt.com

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