3D7110
SILICON DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
Ambient Temperature: 25oC ± 3oC
Supply Voltage (Vcc): 5.0V ± 0.1V
Input Pulse:
High = 3.0V ± 0.1V
Low = 0.0V ± 0.1V
Source Impedance: 50Ω Max.
Rise/Fall Time:
3.0 ns Max. (measured
between 0.6V and 2.4V
)
Pulse Width:
Delay
PWIN = 1.25 x Total
Period:
Delay
PERIN = 2.5 x Total
Device
Under
Test
OUTPUT:
Rload:
Cload:
Threshold:
10KΩ
470Ω
10KΩ ± 10%
5pf ± 10%
1.5V (Rising & Falling)
Digital
Scope
5pf
COMPUTER
SYSTEM
PRINTER
PULSE
GENERATOR
OUT
TRIG
OUT1
OUT2
DEVICE UNDER OUT3
IN
TEST (DUT)
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
REF
IN
DIGITAL SCOPE/
TRIG TIME INTERVAL COUNTER
Figure 2: Test Setup
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
tRISE
PWIN
PERIN
tFALL
INPUT
SIGNAL
2.4V
VIH
1.5V
0.6V
tPLH
2.4V
1.5V
0.6V
VIL
tPHL
OUTPUT
SIGNAL
1.5V
VOH
1.5V
VOL
Figure 3: Timing Diagram
Doc #96005
DATA DELAY DEVICES, INC.
5
12/2/96
3 Mt. Prospect Ave. Clifton, NJ 07013