WE256K8-200CMA Просмотр технического описания (PDF) - White Electronic Designs => Micro Semi
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WE256K8-200CMA Datasheet PDF : 13 Pages
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White Electronic Designs
WE512K8, WE256K8,
WE128K8-XCX
READ
Figure 5 shows Read cycle waveforms. A read cycle begins
with selection address, chip select and output enable. Chip
select is accomplished by placing the CS# line low. Output
enable is done by placing the OE# line low. The memory
places the selected data byte on I/O0 through I/O7 after the
access time. The output of the memory is placed in a high
impedance state shortly after either the OE# line or CS# line
is returned to a high level.
FIGURE 5 – READ WAVEFORMS
ADDRESS
CS#
OE#
OUTPUT
NOTE:
OE# may be delayed up to tACS-tOE after the falling edge of CS# without impact on tOE
or by tACC-tOE after an address change without impact on tACC.
AC READ CHARACTERISTICS (See Figure 5)
FOR WE512K8-XCX
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Hold from Address Change, OE# or CS#
Output Enable to Output Valid
Chip Select or Output Enable to High Z Output
-150
-200
-250
-300
Symbol
Unit
Min Max Min Max Min Max Min Max
trc
150
200
250
300
ns
tacc
150
200
250
300
ns
tacs
150
200
250
300
ns
toh
0
0
0
0
ns
toe
85
85
100
125
ns
tdf
70
70
70
70
ns
FOR WE256K8-XCX and WE128K8-XCX
Parameter
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Hold from Address Change, OE# or CS#
Output Enable to Output Valid
Chip Select or Output Enable to High Z Output
Symbol
trc
tacc
tacs
toh
toe
tdf
-150
Min
Max
150
150
150
0
85
70
-200
Unit
Min
Max
200
ns
200
ns
200
ns
0
ns
85
ns
70
ns
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2000
Rev. 1
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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