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MAX174ACPI Просмотр технического описания (PDF) - Maxim Integrated

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MAX174ACPI
MaximIC
Maxim Integrated MaximIC
MAX174ACPI Datasheet PDF : 18 Pages
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MAX174/MX574A/MX674A
Industry-Standard, Complete 12-Bit ADCs
REFIN
2R* -50I
R*
REFIN
2
DAC
2.5kI
BIPOFF
9.950kI
20VIN 10VIN
5kI
5kI
1.6kI
SAR
Figure 3. Analog Equivalent Circuit
Table 1. Truth Table
CE CS R/C 12/8 A0
OPERATION
0XX
X
X None
X1 X
X
X None
1
0
0
X
0 Initiate 12-bit conversion
1
0
0
X
1 Initiate 12-bit conversion
10
1
1
X Enable 12-bit conversion
1
0
1
0
0 Enable 8 MSBs
1
0
1
0
1
Enable 4 LSBs + 4
trailing 0s
After the conversion is completed, data can be obtained
by the microprocessor. The ADCs have the required
logic for 8-, 12-, and 16-bit bus interfacing, which is
determined by the 12/8 input. If 12/8 is high, the ADCs
are configured for a 16-bit bus. Data lines D0–D11 may
be connected to the bus as either the 12 MSBs or the 12
LSBs. The other 4 bits must be masked out in software.
For 8-bit bus operation, 12/8 is set low. The format is left
justified, and the even address, A0 low, contains the 8
MSBs. The odd address, A0 high, contains the 4 LSBs,
which is followed by 4 trailing 0s. There is no need to
use a software mask when the ADCs are connected to
an 8-bit bus.
Note that the output cannot be forced to a right-justified for-
mat by rearranging the data lines on the 8-bit bus interface.
Table 2. MAX174/MX574A/MX674A Data
Format for 8-Bit Bus
D7 D6 D5 D4 D3 D2 D1 D0
High Byte
(A0 = 0)
MSB
D10
D9
D8
D7
D6
D5
D4
Low Byte
(A0 = 1)
D3
D2 D1 D0
0
0
0
0
27 (MSB)
D7
26 (D10)
D6
25 (D9)
D5
24 (D8)
D4
MAX174
23 (D7)
D3
MX574A
22 (D6)
D2
MX674A
21 (D5)
D1
20 (D4)
D0
19 (D3)
18 (D2)
17 (D1)
16 (LSB)
HARDWIRING FOR 8-BIT DATA BUSES
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