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TC826CBU

A/D CONVERTER WITH BAR GRAPH DISPLAY OUTPUT

TelCom Semiconductor Inc => Microchip 

A/D CONVERTER WITH

BAR GRAPH DISPLAY OUTPUT

TC826

DUAL SLOPE CONVERSION PRINCIPLES

The TC826 is a dual slope, integrating analog–to–digital

converter. The conventional dual slope converter measure-

ment cycle has two distinct phases:

• Input Signal Integration

• Reference Voltage Integration (Deintegration)

The input signal being converted is integrated for a fixed

time period (TSI). Time is measured by counting clock

pulses. An opposite polarity constant reference voltage is

then integrated until the integrator output voltage returns to

zero. The reference integration time is directly proportional

to the input signal (TRI). (Figure 2).

In a simple dual slope converter a complete conversion

requires the integrator output to ‘ramp–up’ and ‘ramp–

down’.

A simple mathematical equation relates the input signal

reference voltage and integration time:

∫1

TSI

VR TR I

RC

VI N (t) dt = RC

0

Where:

VR = Reference Voltage

VSI = Signal Integration Time (Fixed)

TRI = Reference Voltage Integration Time (Variable)

TR I

For a constant VIN: VI N = VR TS I

C

The dual slope converter accuracy is unrelated to the

integrating resistor and capacitor values as long as they are

stable during a measurement cycle. An inherent benefit is

noise immunity. Noise spikes are integrated or averaged to

zero during the integration periods. Integrating ADCs are

immune to the large conversion errors that plague succes-

sive approximation converters in high noise environments.

Interfering signals with frequency components at multiples

of the averaging period will be attenuated. (Figure 3.)

The TC826 converter improves the conventional dual

slope conversion technique by incorporating an auto-zero

phase. This phase eliminates zero-scale offset errors and

drift. A potentiometer is not required to obtain a zero output

for zero input.

30

T = MEASUREMENT

PERIOD

20

10

0

0.1/T

1/T

INPUT FREQUENCY

10/T

Figure 3. Normal-Mode Rejection of Dual Slope Converter

ANALOG

INPUT

SIGNAL

+/–

INTEGRATOR

R

–

+

– COMPARATOR

+

REF

VOLTAGE

SWITCH DRIVER

POLARITY CONTROL

PHASE CONTROL

CONTROL

LOGIC

CLOCK

3-176

VIN ≈ 1/2 VFULL–SCALE

VIN ≈ 1/4 VFULL–SCALE

FIXED SIGNAL VARIABLE

INTEGRATE REFERENCE

TIME

INTEGRATE

TIME

Figure 2. Basic Dual Slope Converter

COUNTER

DISPLAY

TELCOM SEMICONDUCTOR, INC.

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