ISPGDS14 Просмотр технического описания (PDF) - Lattice Semiconductor

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ISPGDS14

in-system programmable Generic Digital Switch™

Lattice Semiconductor 

I/O Macrocell

Switch

Matrix

Specifications ispGDS

Closed only when C0=1 and C1=0

Vcc

4:1 MUX

01

10

11

00

C0

C2

C1

I/O Macrocell Configurations

From

Switch

Matrix

Configuration for Active High Output

- C0 = 0.

- C1 = 1.

- C2 = 1.

From

Switch

Matrix

Configuration for Active Low Output

- C0 = 0.

- C1 = 0.

- C2 = 1.

Configuration for Fixed TTL High Output

Vcc

- C0 = 0.

- C1 = 1.

- C2 = 0.

Configuration for Fixed TTL Low Output

- C0 = 0.

- C1 = 0.

- C2 = 0.

To

Switch

Matrix

Configuration for Dedicated Input

- C0 = 1.

- C1 = 0.

- C2 = 1.

Note 1: The development software configures all of the architecture control bits and checks for proper pin usage automatically.

Note 2: The default configuration for unused pins is for all configuration bits set to one, which produces a tri-stated output.

5

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