82C55A_15 Просмотр технического описания (PDF) - Intersil
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82C55A_15 Datasheet PDF : 30 Pages
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82C55A
The modes for Port A and Port B can be separately defined,
while Port C is divided into two portions as required by the Port
A and Port B definitions. All of the output registers, including
the status flip-flops, will be reset whenever the mode is
changed. Modes may be combined so that their functional
definition can be “tailored” to almost any I/O structure. For
instance: Group B can be programmed in Mode 0 to monitor
simple switch closings or display computational results, Group
A could be programmed in Mode 1 to monitor a keyboard or
tape reader on an interrupt-driven basis.
The mode definitions and possible mode combinations may
seem confusing at first, but after a cursory review of the
complete device operation a simple, logical I/O approach will
surface. The design of the 82C55A has taken into account
things such as efficient PC board layout, control signal
definition vs. PC layout and complete functional flexibility to
support almost any peripheral device with no external logic.
Such design represents the maximum use of the available
pins.
Single Bit Set/Reset Feature (Figure 5)
Any of the eight bits of Port C can be Set or Reset using a
single Output instruction. This feature reduces software
requirements in control-based applications.
When Port C is being used as status/control for Port A or B,
these bits can be set or reset by using the Bit Set/Reset
operation just as if they were output ports.
CONTROL WORD
D7 D6 D5 D4 D3 D2 D1 D0
XX X
DON’T
CARE
BIT SET/RESET
1 = SET
0 = RESET
BIT SELECT
01234567
0 1 0 1 0 1 0 1 B0
0 0 1 1 0 0 1 1 B1
0 0 0 0 1 1 1 1 B2
BIT SET/RESET FLAG
0 = ACTIVE
FIGURE 5. BIT SET/RESET FORMAT
Interrupt Control Functions
When the 82C55A is programmed to operate in mode 1 or
mode 2, control signals are provided that can be used as
interrupt request inputs to the CPU. The interrupt request
signals, generated from port C, can be inhibited or enabled by
setting or resetting the associated INTE flip-flop, using the bit
set/reset function of port C.
This function allows the programmer to enable or disable a
CPU interrupt by a specific I/O device without affecting any
other device in the interrupt structure.
INTE Flip-Flop Definition
(BIT-SET)-INTE is SET - Interrupt Enable
(BIT-RESET)-INTE is Reset - Interrupt Disable
NOTE: All Mask flip-flops are automatically reset during mode
selection and device Reset.
Operating Modes
Mode 0 (Basic Input/Output). This functional configuration
provides simple input and output operations for each of the
three ports. No handshaking is required, data is simply written
to or read from a specific port.
Mode 0 Basic Functional Definitions:
• Two 8-bit ports and two 4-bit ports
• Any Port can be input or output
• Outputs are latched
• Inputs are not latched
• 16 different Input/Output configurations possible
A
D4 D3
00
00
00
00
01
01
01
01
10
10
10
10
11
11
11
11
MODE 0 PORT DEFINITION
B
GROUP A
GROUP B
PORT C
PORT C
D1 D0 PORT A (Upper) # PORT B (Lower)
0 0 Output Output 0 Output Output
0 1 Output Output 1 Output Input
1 0 Output Output 2 Input Output
1 1 Output Output 3 Input Input
0 0 Output Input 4 Output Output
0 1 Output Input 5 Output Input
1 0 Output Input 6 Input Output
1 1 Output Input 7 Input Input
0 0 Input Output 8 Output Output
0 1 Input Output 9 Output Input
1 0 Input Output 10 Input Output
1 1 Input Output 11 Input Input
0 0 Input Input 12 Output Output
0 1 Input Input 13 Output Input
1 0 Input Input 14 Input Output
1 1 Input Input 15 Input Input
FN2969 Rev 11.00
Dec 8, 2015
Page 6 of 30
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