LC82101 Просмотр технического описания (PDF) - SANYO -> Panasonic

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LC82101

Image Processing Circuit for FAX, Copier, and OCR Products

SANYO -> Panasonic 

Sample Application Circuit

LC82101

1. C1: Use a 0.01 µF laminated ceramic capacitor.

2. Set up the polarity of the image signal from the sensor so that white data is represented by the highest potential and

black data by the lowest potential. A level conversion circuit can allow the whole dynamic range of the built-in A/D

converter to be used effectively if the maximum output level of the peaks in the image signal from the sensor does

not reach 4.2 V.

3. When a 64 K SRAM is used as the distortion correction memory, leave MA11 and MA12 unused and connect MA13

and MA14 to the memory A11 and A12 lines.

4. Although AGND and DGND are completely isolated internally in this LSI, AVDD and DVDD are connected through

the substrate. Therefore, the power supply system must be designed so that no potential difference between AVDD

and DVDD can occur. Also, when power is applied or removed, the time lag between the power supplies must be

under 3 ms.

No. 4982-4/5

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