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LC82101 Просмотр технического описания (PDF) - SANYO -> Panasonic

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LC82101 Datasheet PDF : 5 Pages
1 2 3 4 5
Ordering number : EN*4982A
Preliminary
CMOS LSI
LC82101
Image Processing Circuit
for FAX, Copier, and OCR Products
Overview
The LC82101 converts an analog image signal from a
CCD or contact sensor to high-quality binary image data.
The LC82101 uses an internal 8-bit A/D converter for
A/D conversion, and in addition to the orthodox dithering
technique, also supports an error diffusion technique that
allows an even higher quality image to be acquired. These
techniques apply to the whole range of processing
supported by the LC82101, including full-pixel distortion
correction, gamma conversion for arbitrary gamma
curves, image compression processing, two-dimensional
filtering, halftone processing, and image separation
processing to separate documents into text, photograph,
and halftone regions. Thus this LSI implements the image
processing required by FAX, copier, and OCR systems.
Features
• Number of pixels processed
2048 pixels/line (64 KB memory, white correction only)
4096 pixels/line (256 KB memory, both white and black
correction)
8192 pixels/line (256 KB memory, white correction
only)
• Processing speed
500 ns/pixel maximum (The processing time for 1 pixel
is 16/SYSCLK.)
• Supports medium speed products with a single external
memory chip
100 ns access time memory allows 800 ns/pixel
processing, and 60 ns access time memory allows
500 ns/pixel processing.
• AGC (The A/D converter high-level reference voltage is
varied from 1.2 to 4.2 V in 0.2 V steps.)
• Built-in 8-bit A/D converter (includes a sensor signal
delay adjustment function)
• Sensor drive circuit (supports CCD and all CIS types)
• Digital clamp (single-point clamp, even/odd clamp)
• Distortion correction (white correction, black correction,
full-pixel correction)
• Gamma correction (supports user-defined curves)
• Image area separation (text, photographs, halftone)
• Simple binary-conversion processing (fixed threshold
level, density-adaptive threshold level)
• Halftone processing
Structural dithering (64 levels), settable dithering
threshold level
Error diffusion technique (64 levels)
• Image reduction (thinning, fine black line retaining, fine
white line retaining)
• Single-voltage 5 V supply and low power due to CMOS
process fabrication
Package Dimensions
unit: mm
3174-QFP80E
[LC82101]
SANYO: QIP80E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
63095HA (OT) No. 4982-1/5

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