ADC-318 Просмотр технического описания (PDF) - DATEL Data Acquisition products
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производитель
ADC-318 Datasheet PDF : 8 Pages
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®
ADC-318, ADC-318A
3ns min. 6ns max
N+2
N+4
N-1
Tds
N+1
N+3
N+7
ANALOG SIGNAL AIN
T
N
N+5
N+6
TPW1
A/D CLOCK
A DATA OUTPUT
B DATA OUTPUT
TPW0
CLOCK OUT
Trh
RSET
0ns min.
Trs
3.5ns min.
RESET PERIOD
Trh
Trs
Td clock
4.5ns min. 8ns max.
2.0V
0.8V
Tdo2
6.5ns min. 10ns max.
N+1
2.0V
0.8V
N+3
N
2.0V
0.8V
Tdo1
T+2ns max.
2.0V
0.8V
N+2
~T
~T
318 318A
TPW1, min 3.2ns 3.0ns
TPW0, min 3.2ns 3.0ns
Figure 3-1: Demultiplexed Data Output (Select-Pin: +DVS or left open, 120MHz max. Clock Frequency)
ANALOG SIGNAL AIN
A/D CLOCK
A DATA OUTPUT
B DATA OUTPUT
CLOCK OUT
(inverted A/D CLOCK OUT)
RSET
Tds 3ns min. 6ns max.
N-1
N
N+2
N+3
T
N+1
TPW1 TPW0
N-4
2.0V
0.8V
N-3
N-2
N-1
N
N-5
2.0V
0.8V
N-4
N-3
N-2
N-1
Tdo2
6.5ns min. 10ns max.
2.0V
0.8V
Td clock
4.5ns min. 8ns max.
318 318A
TPW1, min 3.2ns 3.0ns
TPW0, min 3.2ns 3.0ns
Figure 3-2: Straight Data Output (Select-Pin: DGND, 100MHz max. Clock Frequency)
A/D CLOCK
CLOCK OUT 1
DATA OUT 1
(A,B)
CLOCK OUT 2
DATA OUT 2
(A,B)
A/D CLOCK
A/D CLOCK
ADC-318/318A
RSET
CLOCK OUT 1
(1)
8 DATA 1 (A, B)
8
A/D CLOCK
ADC-318/318A
RAS/DETCLOCK
CLOCK OUT 2
(2)
8 DATA 2 (A, B)
8
Figure 3-3: Parallel Operation without RSET Pulse
A/D CLOCK
RSET
CLOCK OUT 1
DATA OUT 1
(A,B)
CLOCK OUT 2
DATA OUT 2
(A,B)
A/D CLOCK
A/D CLOCK
ADC-318/318A
RSET
CLOCK OUT 1
(1)
8 DATA 1 (A, B)
8
RSET
A/D CLOCK
ADC-318/318A
RAS/EDTCLOCK
CLOCK OUT 2
(2)
8 DATA 2 (A, B)
8
Figure 3-4: Parallel Operation using RSET Synchronization
5
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