76105SK8 Просмотр технического описания (PDF) - Intersil
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76105SK8 Datasheet PDF : 12 Pages
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HUF76105SK8
Test Circuits and Waveforms (Continued)
VGS
Ig(REF)
VDS
RL
DUT
+
VDD
-
FIGURE 19. GATE CHARGE TEST CIRCUIT
VDD
VDS
Qg(TOT)
VGS
VGS = 1V
0
Qg(TH)
Qgs
Ig(REF)
0
Qg(5)
Qgd
VGS = 5V
VGS = 10V
FIGURE 20. GATE CHARGE WAVEFORMS
VDS
RL
VGS
VGS
RGS
DUT
+
VDD
-
FIGURE 21. SWITCHING TIME TEST CIRCUIT
Thermal Resistance vs. Mounting Pad Area
The maximum rated junction temperature, TJM, and the thermal
resistance of the heat dissipating path determines the maximum
allowable device power dissipation, PDM, in an application.
Therefore the application’s ambient temperature, TA(oC), and
thermal resistance RθJA (oC/W) must be reviewed to ensure that
TJM is never exceeded. Equation 1 mathematically represents
the relationship and serves as the basis for establishing the rat-
ing of the part.
PDM = (---T----J--Z-M--θ----J-–--A--T----A-----)
(EQ. 1)
In using surface mount devices such as the SOP-8 package,
the environment in which it is applied will have a significant
influence on the part’s current and maximum power dissipation
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
10%
0
VGS
10%
0
50%
PULSE WIDTH
10%
90%
50%
FIGURE 22. SWITCHING TIME WAVEFORM
ratings. Precise determination of PDM is complex and influ-
enced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board.
2. The number of copper layers and the thickness of the
board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the
duty cycle and the transient thermal response of the part,
the board and the environment they are in.
8-7
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