NXP Semiconductors
BUK9K17-60E
Dual N-channel 60 V, 17 mΩ logic level MOSFET
Symbol
Parameter
Conditions
QGD
gate-drain charge
Ciss
input capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Coss
output capacitance
Tj = 25 °C; Fig. 15
Crss
reverse transfer
VGS = 0 V; VDS = 48 V; f = 1 MHz;
capacitance
Tj = 25 °C; Fig. 15
td(on)
tr
turn-on delay time
rise time
VDS = 48 V; RL = 5 Ω; VGS = 5 V;
RG(ext) = 5 Ω; Tj = 25 °C; ID = 10 A
td(off)
turn-off delay time
tf
fall time
Source-drain diode FET1 and FET2
VSD
source-drain voltage IS = 10 A; VGS = 0 V; Tj = 25 °C; Fig. 16
trr
reverse recovery time IS = 10 A; dIS/dt = -100 A/µs; VGS = 0 V;
Qr
recovered charge
VDS = 30 V; Tj = 25 °C
Min Typ Max Unit
-
5.7 -
nC
-
1667 2223 pF
-
160 193 pF
-
91
124 pF
-
10.7 -
ns
-
20
-
ns
-
23
-
ns
-
19.2 -
ns
-
0.78 1.2 V
-
20.3 -
ns
-
16.7 -
nC
40
ID
(A)
10 V
4.5 V
32
VGS = 3 V
24
16
003aal086
2.8 V
2.6 V
40
RDSon
30
20
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10
8
2.4 V
Fig. 6.
0
0
1
2
Tj = 25 °C; tp = 300 μs
2.2 V
3
4
VDS (V)
Output characteristics; drain current as a
function of drain-source voltage; typical values
Fig. 7.
0
0 2 4 6 8 10 12 14 16
VGS (V)
Drain-source on-state resistance as a function
of gate-source voltage; typical values
BUK9K17-60E
Product data sheet
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19 March 2014
© NXP Semiconductors N.V. 2014. All rights reserved
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