M36DR432-ZAT Просмотр технического описания (PDF) - STMicroelectronics

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M36DR432-ZAT

32 Mbit (2Mb x16, Dual Bank, Page) Flash Memory and 4 Mbit (256K x16) SRAM, Multiple Memory Product

STMicroelectronics 

M36DR432A, M36DR432B

Table 3. Main Operation Modes

Operation

Mode

EF GF WF RPF WPF

VPPF

E1S E2S GS WS UBS, LBS (1) DQ15-DQ0

Read

VIL VIL VIH VIH X Don't care

SRAM must be disabled

Data

Output

Write

VIL VIH VIL VIH VIH

VCCF or

VPPFH

SRAM must be disabled

Data Input

Block

Locking

VIL X X VIH VIL Don't care

SRAM must be disabled

X

Standby VIH X X VIH X Don't care

Any SRAM mode is allowable

Hi-Z

Reset

X X X VIL X Don't care

Any SRAM mode is allowable

Hi-Z

Output

Disable

VIL VIH VIH VIH X Don't care

Any SRAM mode is allowable

Hi-Z

Read

Flash must be disabled

VIL VIH VIL VIH

VIL

Data out

Word Read

Write

Flash must be disabled

VIL VIH VIH VIL

VIL

Data in

Word Write

Standby/

Power

Down

VIH X X X

X

Hi-Z

Any Flash mode is allowable

X VIL X X

X

Hi-Z

XXXX

VIH

Hi-Z

VIH X X X

X

Hi-Z

Data

Retention

Any Flash mode is allowable

X VIL X X

X

Hi-Z

XXXX

VIH

Hi-Z

Output

Disable

Any Flash mode is allowable

VIL VIH VIH VIH

X

Note: X = VIL or VIH, VPPFH = 12V ± 5%.

1. If UBS and LBS are tied together the bus is at 16 bit. For an 8 bit bus configuration use UBS and LBS separately.

Hi-Z

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