LT1432-3.3 Просмотр технического описания (PDF) - Linear Technology

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LT1432-3.3

3.3V High Efficiency Step-Down Switching Regulator Controller

Linear Technology 

LT1432-3.3

APPLICATI S I FOR ATIO

Schottky 1N5818. Diode type is more critical for the output

connection because the high capacitance of Schottky diodes

creates narrow output spikes. These spikes will be eliminated

if a secondary output filter is used or if there is sufficient lead

length between the regulator output and the load bypass

capacitors. Low capacitance diodes like the 1N4148 do not

create large spikes, but their high forward resistance requires

even higher input voltage to start.

D1, L1 and C2 act as the conventional catch diode and

output filter of the buck converter. These components

should be selected carefully to maintain high efficiency

and acceptable output ripple. See the original LT1432 (5V)

data sheet for detailed discussions of these parts.

Current limiting is performed by R2. Sense voltage is only

60mV to maintain high efficiency. This also reduces the

value of the sense resistor enough to utilize a printed

circuit board trace as the sense resistor. The sense voltage

has a positive temperature coefficient of 0.33%/°C to

match the temperature coefficient of copper.

The basic regulator has three different operating modes,

defined by the Mode pin drive. Normal operation occurs when

the Mode pin is grounded. A low quiescent current Burst

Mode operation can be initiated by floating the Mode pin.

Input supply current is typically 1.3mA in this mode, and

output ripple voltage is 100mVp-p. Pulling the Mode pin

above 2.5V forces the entire regulator into micropower

shutdown where it typically draws less than 20µA.

Burst Mode Operation

Burst Mode operation is initiated by allowing the Mode pin to

float, where it will assume a DC voltage of approximately 1V.

If AC pickup from surrounding logic lines is likely, the Mode

pin should be bypassed with a 200pF capacitor. Burst Mode

operation is used to reduce quiescent operating current when

the regulator output current is very low, as in sleep mode in

a lap-top computer. In this mode, hysteresis is added to the

error amplifier to make it switch on and off, rather than

maintain a constant amplifier output. This forces the switch-

ing IC to either provide a rapidly increasing current or to go

into full micropower shutdown. Current is delivered to the

output capacitor in pulses of higher amplitude and low duty

cycle rather than a continuous stream of low amplitude

pulses. This maximizes efficiency at light load by eliminating

quiescent current in the switching IC during the period

between bursts.

The result of pulsating currents into the output capacitor

is that output ripple amplitude increases and ripple fre-

quency becomes a function of load current. The typical

output ripple in Burst Mode operation is 100mVp-p, and

ripple frequency can vary from 50Hz to 2kHz. This is not

normally a problem for the logic circuits which are kept

alive during sleep mode.

Some thought must be given to proper sequencing be-

tween normal mode and Burst Mode operation. A heavy

(>100mA) load in Burst Mode operation can cause exces-

sive output ripple, and an abnormally light load (10mA to

30mA, see Figure 3) in normal mode can cause the

regulator to revert to a quasi-Burst Mode operation that

also has higher output ripple. The worst condition is a

sudden, large increase in load current (>100mA) during

this quasi-Burst Mode operation or just after a switch

from Burst Mode operation to normal mode. This can

cause the output to sag badly while the regulator is

establishing normal mode operation (≈100µs). To avoid

problems, it is suggested that the power-down sequence

consist of reducing load current to below 100mA, but

greater than the minimum for normal mode, then switch-

ing to Burst Mode operation, followed by a reduction of

load current to the final sleep value. Power-up would

consist of increasing the load current to the minimum for

50

NORMAL MODE

TJ = 25°C

40

30

20

DIODE TO OUTPUT (1N5818)

DIODE TO INPUT (1N5818)

10

0

4

5

6

7

8

9

INPUT VOLTAGE (V)

LT1432-3.3 • F03

Figure 3. Minimum Normal Mode Load Current

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

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