MC145583DW Просмотр технического описания (PDF) - LANSDALE Semiconductor Inc.
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MC145583DW
LANSDALE Semiconductor Inc.
MC145583DW Datasheet PDF : 7 Pages
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ML145583
LANSDALE Semiconductor, Inc.
DRIVER ELECTRICAL SPECIFICATIONS
(Voltage polarities referenced to GND = 0 V; VCC = + 3.3 V or + 5.0 V 10%; C1 – C5 = 1 µF; TA = 25°C)
Parameter
Symbol
Min
Typ
Max
Unit
Digital Input Voltage
Logic Low
Logic High
DI1 – DI3
VIL
—
VIH
1.8
Digital Input Current
VDI = GND
VDI = VCC
DI1 – DI3
IIL
—
IIH
—
Output High Voltage
VOH
Load on All Tx1 – Tx3, RL = 3 kΩ; CP = 2500 pF, VDI1 – DI3 = Logic Low
5.0
No Load
8.5
V
—
0.7
—
—
µA
7
—
—
± 1.0
V
7.0
—
8.8
—
Output Low Voltage
VOL
V
Load on All Tx1 – Tx3, RL = 3 kΩ; CP = 2500 pF, VDI1 – DI3 = Logic High
—
– 7.0
– 5.0
No Load
—
– 8.8
– 8.5
Ripple (Refer to VDD – VSS Value) ***
Off Source Impedance
Output Short Circuit Current (VCC = 3.3 V or 5.5 V)
Tx1 – Tx3 Shorted to GND*
Tx1 – Tx3 Shorted to ± 15 V**
VRF
—
Tx1 – Tx3
Zoff
300
ISC
—
—
—
± 5%
—
—
Ω
mA
—
± 60
—
± 100
* Specification is for one Tx output to be shorted at a time. Should all three driver outputs be shorted simultaneously, device power dissipation
limits could be exceeded.
** This condition could exceed package limitations.
*** Ripple VRF would not exceed ± 5% of (VDD – VSS).
SWITCHING CHARACTERISTICS (VCC = + 3.3 V or + 5 V, 10%; C1 – C5 = 1 µF; TA = 25°C)
Parameter
Symbol
Min
Typ
Max
Unit
Drivers
Propagation Delay Time
Low–to–High
(RL = 3 kΩ, CL = 50 pF or 2500 pF)
Tx1 – Tx3 tDPLH
—
0.5
µs
1
High–to–Low
(RL = 3 kΩ, CL = 50 pF or 2500 pF)
tDPHL
—
0.5
1
Output Slew Rate (Source R = 300 Ω)
Loading: RL = 3 – 7 kΩ; CL = 2500 pF
Tx1 – Tx3
SR
±4
—
± 30
V/µs
Output Disable Time*
tDAZ
—
4
10
µs
Output Enable Time*
Receivers
tDZA
—
25
50
ms
Propagation Delay Time
Low–to–High
DO1 – DO5
tRPLH
—
—
µs
1
High–to–Low
tRPHL
—
—
1
Output Rise Time
DO1 – DO5
tr
—
120
200
ns
Output Fall Time
DO1 – DO5
tf
—
40
100
ns
Output Disable Time*
tRAZ
—
4
10
µs
Output Enable Time*
* Including the charge pump setup time.
tRZA
—
25
50
ms
TRUTH TABLES
Drivers
DI
STB
Tx
X
H
Z*
H
L
L
L
L
H
* VSS VTx ≤ VDD X = Don’t Care
Receivers
Rx
STB
X
H
H
L
L
L
* GND VDO ≤ VCC
DO
Z*
L
H
X = Don’t Care
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