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AD6411AST Просмотр технического описания (PDF) - Analog Devices

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Компоненты Описание
производитель
AD6411AST
AD
Analog Devices AD
AD6411AST Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
AD6411–SPECIFICATIONS (TA = 25؇C, 3.0 V < VBAT < 5.5 V unless otherwise noted)
Parameter
Conditions
Min Typ
Max
RECEIVE RF MIXER
RF Input Frequency
1880 to
1930
Units
MHz
Power Gain
Input 1 dB Compression Point
Input Third-Order Intercept
SSB Noise Figure
Output VSWR
Output Impedance
Input Impedance
RX IF AMPLIFIERS
Differential Input Impedance
Input VSWR
IF Noise Figure
RSSI
RSSI Upper Limit
RSSI Lower Limit
RSSI High Level Voltage
RSSI Low Level Voltage
RSSI Slope
RSSI Output Impedance
RSSI Output Response Time
PLL DEMODULATOR
PLL Demodulator Phase Detector Gain
Leakage Current at COFF
Recommended External VCO Gain
Demodulator Gain
Demodulator Linearity
VOLTAGE REFERENCE
Output Voltage
Output Current
TRANSMIT SECTION
Output Power
Harmonically Related Spurii
Other Spurii
Output Phase Noise
1.2 MHz
3.0 MHz
>4.7 MHz
VCO Operating Frequency Range
Oscillator Push
Oscillator Pull
SYNTHESIZER
Reference Input Impedance
Reference Input Level
Reference Input Frequency
VCO Signal Input Range
Charge Pump Current – “Up”
Charge Pump Current – “Down”
Charge Pump Leakage
BSW Output “High” Voltage
ZSOURCE = 50 , ZLOAD = 200
ZSOURCE = 50 , ZLOAD = 200
ZSOURCE = 50 , ZLOAD = 200
ZSOURCE = 50 , ZLOAD = 200
100 MHz–120 MHz
Input Power < –11 dBm
ZSOURCE = 200 Differential
ZSOURCE = 200 Differential
ZSOURCE = 200 Differential
Input Power = 0 dBm (at IF Input)
Input Power = –90 dBm (at IF Input)
–90 dBm < Input Power < 0 dBm (at IF Input)
VRSSI = 0.3 V
Settling to 95% Value for a 40 dB Input Step,
20 pF External Load
@ 90 Degree Relative Phase
Charge Pump Disabled
VCO Gain Set to 1.152 MHz/V
THD for FM Tone @ 576 kHz,
Peak Deviation 288 kHz
ZL = 50
At 0.5 × DECT_Tx: (940 MHz–950 MHz)
At 1.5 × DECT_Tx: (2820 MHz–2850 MHz)
100 MHz–3000 MHz, Outside DECT Band
1 MHz Measurement Bandwidth
With UHF Resonator Qu > 30
With Suitable External Resonator
Using On-Chip Regulator, 250 mV VBAT
Step Change with 5 µs Rise/Fall Time
VSWR = 2:1 Any Phase
Voltage On Loop Filter (Pin 38) = 1.4 V
Voltage On Loop Filter (Pin 38) = 1.4 V
Output Disabled
at ILOAD < = 2 mA
15
–21
–5
80
1.3
–3
700
100
10
700
–1.30
0.66
2.5
19
–16
–8
11
200
50
200
6
+3
–95
1.7
0.3
14
700
115
100
1.152
1.736
–30
1.37
+1
–10
–20
–73
–120
–130
–135
6
55
>5
1.0
1.0
<± 1
21
1.5:1
dB
dBm
dBm
dB
1.5:1
dB
dBm
dBm
V
V
mV/dB
2
µs
150 µA/rad
pA
MHz/V
V/MHz
dBc
1.44 V
100 µA
+4
dBm
dBc
dBc
dBc
1200
dBc/Hz
dBc/Hz
dBc/Hz
MHz
kHz
kHz
1000
20
1200
–0.77
1.15
k
mV p-p
MHz
MHz
mA
mA
nA
V
–2–
REV. 0

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